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  austriamicrosystems ag is now ams ag the technical content of this austriamicrosystems datasheet is still valid. contact information: headquarters: ams ag tobelbaderstrasse 30 8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 e - mail: ams_sales @ams.com please visit our website at www.ams.com free datasheet http:///
a s 3 6 6 1 p r o g r a m m a b l e 9 - c h a n n e l l e d d r i v e r www.austriamicrosystems.com revision 1.3 1 - 85 d ata s hee t 1 general description the AS3661 is a 9-channel led driver designed to p roduce lighting effects for mobile devices. a high- efficiency charge pump enables led driving over full li- ion battery voltage range. the device is equipped with an internal program memory, which allows operation without processor control. the AS3661 maintains excellent efficiency over a wide operating range by autonomously selecting the best charge pump gain based on led forward voltage requirements. AS3661 is able to automatically enter power-save mode when led outputs are not active, thus lowering idle current consumption down to 10 a (typ). the AS3661 has an i2c-compatible control interface with four pin selectable addresses. also, the device has a flexible general purpose output (gpo), which can be used as a digital control pin for other devices. int pin can be used to notify processor when a lighting sequence has ended (interrupt - function). also, the device has a trigger input interface, which allows synchronization between multiple devices.the device requires only four small and low-cost ceramic capacitors. the AS3661 is available in a tiny wl-csp-25 (2.285x2.285mm) 0.4mm pitch package. 2 key features three independent program execution engines; 9 p rogrammable outputs with 25.5 ma full-scale current, 8- bit current setting resolution and 12-bit pwm control resolution adaptive charge pump with 1x and 1.5x gain p rovides up to 95% led drive efficiency charge pump with soft start and overcurrent/short c ircuit protection built-in led test automatic power save mode; ivdd = 10 a (typ.) two wire, i2c-compatible, control interface flexible instruction set large sram program memory small application circuit source (high side) drivers minimum number of external components architecture supports color control 3 applications the product is ideal for fun and indicator lights, led b acklighting, and programmable current source.     
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www.austriamicrosystems.com revision 1.3 2 - 85 AS3661 datasheet contents 1 general description ............................................................................................................................ 1 2 key features .......................................................................................................................................1 3 applications ........................................................................................................................................ 1 4 pinout ................................................................................................................................................... 5 4.1 pin assignment . .............................................................................................................................................5 4.2 pin description ...............................................................................................................................................5 5 absolute maximum ratings ............................................................................................................... 7 6 electrical characteristics ................................................................................................................... 8 7 typical operating characteristics ................................................................................................... 12 8 detailed description .........................................................................................................................14 8.1 programming . ..............................................................................................................................................14 8.2 led error detection .....................................................................................................................................14 8.3 energy efficiency .........................................................................................................................................14 8.4 temperature compensation ........................................................................................................................14 8.5 modes of operation .....................................................................................................................................16 8.5.1 reset .................................................................................................................................................16 8.5.2 standby ............................................................................................................................................16 8.5.3 startup ............................................................................................................................................16 8.5.4 normal ..............................................................................................................................................16 8.5.5 power save .....................................................................................................................................16 8.6 charge pump operational description ........................................................................................................17 8.6.1 overview ..............................................................................................................................................17 8.6.2 output resistance ................................................................................................................................17 8.6.3 controlling the charge pump ...............................................................................................................18 8.6.4 led forward voltage monitoring .........................................................................................................18 8.6.5 gain change hysteresis ......................................................................................................................18 8.6.6 automatic power save mode ...............................................................................................................19 8.6.7 pwm power save mode ......................................................................................................................19 8.7 led driver operational description .............................................................................................................20 8.7.1 powering leds ....................................................................................................................................21 8.7.2 controlling the high-side led drivers ..................................................................................................21 8.8 i2c compatible control interface .................................................................................................................22 8.8.1 i 2 c address selection ...........................................................................................................................22 8 .8.2 bus not busy .......................................................................................................................................22 8.8.3 start data transfer ...............................................................................................................................22 8.8.4 stop data transfer ...............................................................................................................................22 8.8.5 data valid .............................................................................................................................................22 8.8.6 acknowledge ........................................................................................................................................22 8.8.7 program downloading ..........................................................................................................................25 8.9 register set .................................................................................................................................................25 8.10 control register details .............................................................................................................................35 8.10.1 enable/ engine control1 .........................................................................................................35 8.10.2 engine cntrl2 ..............................................................................................................................36 8.10.3 output direct/ratiometric msb and lsb .............................................................................37 8.10.4 output on/off control msb and lsb ....................................................................................38 ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 3 - 85 AS3661 datasheet 8.10.5 ledx control ......................................................................................................................................39 8 .10.6 ledx pwm .........................................................................................................................................45 8.10.7 ledx current control .............................................................................................................48 8.10.8 misc ..................................................................................................................................................51 8.10.9 enginex pc ......................................................................................................................................52 8.10.10 status/interrupt .....................................................................................................................52 8.10.11 gpo .................................................................................................................................................54 8.10.12 variable ........................................................................................................................................54 8.10.13 reset .............................................................................................................................................54 8.10.14 temp adc control .................................................................................................................55 8.10.15 temperature read .................................................................................................................55 8.10.16 temperature write ...............................................................................................................56 8.10.17 led test control ...................................................................................................................56 8.10.18 led test adc ............................................................................................................................57 8.10.19 engine1 variable a .................................................................................................................58 8.10.20 engine2 variable a .................................................................................................................58 8.10.21 engine3 variable a .................................................................................................................58 8.10.22 master fader1 .........................................................................................................................58 8.10.23 49 master fader2 ....................................................................................................................59 8.10.24 4a master fader3 ......................................................................................................................59 8.10.25 eng1 prog start addr ............................................................................................................59 8.10.26 eng2 prog start addr ..........................................................................................................59 8.10.27 eng3 prog start addr ..........................................................................................................59 8.10.28 prog mem page select .........................................................................................................60 8.10.29 eng1 mapping msb ...................................................................................................................60 8.10.30 71h eng1 mapping lsb ..............................................................................................................60 8.10.31 eng2 mapping msb .....................................................................................................................61 8.10.32 eng2 mapping lsb ......................................................................................................................61 8.10.33 eng3 mapping msb .....................................................................................................................61 8.10.34 eng3 mapping lsb ....................................................................................................................62 8.10.35 gain change ctrl ......................................................................................................................63 8.11 instruction set ............................................................................................................................................64 8.12 led driver instructions ..............................................................................................................................67 8.12.1 ramp (numerical operands) ............................................................................................................67 8.12.2 ramp (variables) ..............................................................................................................................68 8.12.3 set pwm (numerical operands) ......................................................................................................69 8.12.4 set pwm (variables) ........................................................................................................................70 8.12.5 wait ..................................................................................................................................................70 8.13 led mapping instructions ..........................................................................................................................71 8.13.1 mux_ld_start ...............................................................................................................................71 8.13.2 mux_ld_end ...................................................................................................................................71 8.13.3 mux_map_start ............................................................................................................................72 8.13.4 mux_sel ..........................................................................................................................................72 8.13.5 mux_clr ..........................................................................................................................................72 8.13.6 mux_map_next ..............................................................................................................................73 8.13.7 mux_map_prev ..............................................................................................................................73 8.13.8 mux_ld_next .................................................................................................................................74 8.13.9 mux_ld_prev .................................................................................................................................74 8.13.10 mux_map_addr ...........................................................................................................................74 ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 4 - 85 AS3661 datasheet 8.13.11 mux_ld_addr ..............................................................................................................................74 8 .14 branch instructions ....................................................................................................................................75 8.14.1 rst ....................................................................................................................................................75 8.14.2 branch (numerical) ........................................................................................................................75 8.14.3 branch (variables) ..........................................................................................................................76 8.14.4 int .....................................................................................................................................................76 8.14.5 end ....................................................................................................................................................76 8.14.6 trigger ...........................................................................................................................................76 8.14.7 jne/jl/jge/je ..................................................................................................................................77 8.15 arithmetic instructions ...............................................................................................................................78 8.15.1 ld .......................................................................................................................................................78 8.15.2 add (numerical operands) ...............................................................................................................78 8.15.3 add (variables) .................................................................................................................................78 8.15.4 sub (numerical) ................................................................................................................................79 8.15.5 sub (variables) .................................................................................................................................79 9 typical application ........................................................................................................................... 81 9.1 recommended external components . ........................................................................................................82 10 package drawings and markings .................................................................................................. 83 1 1 ordering information ...................................................................................................................... 84 ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 5 - 85 AS3661 datasheet - p i n o u t 4 pinout 4 .1 pin assignment figure 2. pin assignments (top view) 4.2 pin description table 1. pin description for AS3661 pin number pin name description a1 led1 led1 output . current source from v cp . a 2 led2 led2 output . current source from v cp . a 3 vcp charge pump output. make a short connection to capacitor c vcpout . a 4 c2- charge pump flying capacitor 2. make a short connection to capacitor c fly2 . a 5 c2+ charge pump flying capacitor 2. make a short connection to capacitor c fly2 . b 1 led3 led3 output . current source from v cp . b 2 led4 led4 output . current source from v cp . b 3 asel1 digital input - i2c address select b4 c1- charge pump flying capacitor 1. make a short connection to capacitor c fly1 . b 5 c1+ charge pump flying capacitor 1. make a short connection to capacitor c fly1 . c 1 led5 led5 output . current source from v cp . c 2 led6 led6 output . current source from v cp . c 3 asel0 digital input - i2c address select c4 en enable. active high digital input. c5 vbat positive power supply input d1 led7 led7 output . current source from vbat. d2 led8 led8 output . current source from vbat. d3 int interrupt output. open drain digital output for microcontroller unit, leave unconnected if not used. d4 clk32k digital clock input. connect a 32khz signal; if this signal is not available, connect this pin to gnd.  
                

  


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www.austriamicrosystems.com revision 1.3 6 - 85 AS3661 datasheet - p i n o u t d5 g nd ground e1 led9 led9 output . current source from vbat. e2 gpo general purpose output. leave unconnected if not used. e3 trig trigger input. open drain, connect to ground if not used. e4 sda serial-data i/o . open drain digital i/o i2c data pin. e5 scl serial-clock input table 1. pin description for AS3661 pin number pin name description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 7 - 85 AS3661 datasheet - a b s o l u t e m a x i m u m r a t i n g s 5 absolute maximum ratings stresses beyond those listed in t able 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in table 3. electrical ch aracteristics on page 8 is not implied. exposure to absolute maximum rating c onditions for extended periods may affect device reliability. table 2. absolute maximum ratings parameter min max units comments vbat, vcp, c1+, c1-, c2+, c2- to gnd -0.3 +7.0 v vcp to vbat -0.3 v diode between v cp and vbat l ed1, led2....led9 to gnd -0.3 +7.0 v sda, scl, en, clk32k, trig, int, gpo, asel0, asel1 to gnd -0.3 +7.0 v electrostatic discharge esd hbm (led1 to led2) 8 kv jedec jesd22-a114 esd hbm (all other pins) 2.5 kv esd mm 250 v jedec jesd22-a115 esd cdm 1 kv jedec jesd22-c101 temperature ranges and storage conditions continous power dissipation internally limited (overtemperature protection) 1 1. internal thermal shutdown circuitry protects the device from permanent damage. thermal shutdown engages at t j = 150c (typ.) and disengages at t j = 130c (typ.). junction temperature (t jmax ) +125 oc s torage temperature range -55 +125 oc body temperature during soldering +260 oc ipc/jedec j-std-020 junction to ambient thermal resistance ( q ja ) 2 2. junction to ambient thermal resistance is highly application and board-layout dependent. in applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design. 87 c/w moisture sensitive level 1 represents a max. floor life time of unlimited recommended operating conditions recommended charge pump load current 0 100 ma ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 8 - 85 AS3661 datasheet - e l e c t r i c a l c h a r a c t e r i s t i c s 6 electrical characteristics v bat = 3.6v, v en = 1.65v, c bat = c vcpout = 1.0f, c fly1-2 = 0.47f, t amb = -30oc to +85oc, typical values @ t amb = + 25oc (unless otherwise specified) 1 . table 3. electrical characteristics symbol parameter condition min typ max unit general operating conditions v bat supply voltage 2 .7 5.5 v i vbat standby supply c urrent en = 0v or chip_en=0 (bit), external 32 khz clock running or not running 1.4 4 a normal mode supply current external 32 khz clock running, charge pump and current source outputs disabled 0.16 0.22 ma charge pump in 1x mode, no load, current source outputs disabled 0.16 0.22 ma charge pump in 1.5x mode, no load, current source outputs disabled 1.4 ma power save mode supply current external 32 khz clock running 3.1 5 a internal oscillator running 0.16 0.23 ma f osc internal oscillator f requency accuracy t amb = +25oc - 4 +4 % -7 +7 t amb operating t emperature 1 -30 25 85 c charge pump r out charge pump output r esistance gain = 1.5 and v bat = 2.9v 6 w g ain = 1 and v bat = 2.9v 1 g ain = 1.5 and v bat = 3.6v 1 .4 gain = 1 and v bat = 3.6v 1 f sw switching frequency 1 .2 1.25 1.3 mhz i gnd ground current g ain = 1.5 1.2 ma gain = 1 1 a t on v cp turn-on time 2 v bat = 3.6v, i out = 60 ma 100 s i load charge pump load c urrent recommended charge pump load current 0 100 ma led driver i leak leakage current ( led1 to led9) pwm = 0% 0.1 1 a i max maximum source c urrent outputs led1 to led9 25.5 ma i out output current 3 accuracy output current set to 17.5 ma t amb = +25oc -2.5% +2.5% % - 5 +5 i match matching o utput current set to 17.5 ma 1 2.5 % f led led switching f requency 312 hz v sat saturation voltage 4 output current set to 17.5 ma 45 100 mv led test ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 9 - 85 AS3661 datasheet - e l e c t r i c a l c h a r a c t e r i s t i c s 1. low-esr surface-mount ceramic capacitors 8mlccs) used in setting electrical characteris- tics. lsb least significant bit 3 0 mv e abs total unadjusted e rror 5 v in_test = 0v to v bat <3 4 lsb t conv conversion time 2 .7 ms v in_test dc voltage range 0 5 v logic interface logic input en v il input low level 0 .5 v v ih input high level 1 .2 v i in input current - 1.0 1.0 a t delay input delay 6 2 s logic input scl, sda, trig, clk32k, asel0, asel1 v il input low level 0 .2x v en v v ih input high level 0 .8x v en v i in input current - 1.0 1.0 a logic output sda, trig, int v ol output low level i out = 3 ma (pull-up current) 0 .3 0.5 v i l output leakage c urrent v cp = 2.8v 1 .0 a logic output gpo v ol output low level i out = 3 ma 0 .3 0.5 v v oh output high level i out = -2 ma v bat - 0 .5 v bat - 0 .3 v i l output leakage c urrent v cp = 2.8v 1 .0 a logic input clk32k f clk clock frequency 3 2.7 khz f clkh high time 6 s f clkl low time 6 s t r clock rise time 1 0 to 90% 2 s t f clock fall time 9 0 to 10% 2 s 1. in applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. maximum ambient temperature (t amb-max ) is dependent on the maximum operating junction temperature (t j-max =125c), the maximum power dissipation of the devi ce in the application (p d-max ) and the junction to ambient thermal resistance of the part/package in the application ( q ja ) as given by the following equation: t amb-max = t j-max - ( q ja * p d-max ). 2. turn-on time is measured from the moment the charge pump is activated until the v cp crosses 90% of its target value table 3. electrical characteristics (continued) symbol parameter condition min typ max unit ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 10 - 85 AS3661 datasheet - e l e c t r i c a l c h a r a c t e r i s t i c s figure 3. i 2 c mode timing diagram . 3 . output current accuracy is the difference between actual value of the output current and programmed value of this current. i match is determined as follows: for the constant current d1 to d9, the following are determined: the maximum current (max) and the minimum current (min), then the i match is calculated with: i match = 100*(((max-min)/2)+((max+min)/2))/((max+min)/2)- 1 00 4. saturation voltage is defined as the voltage when the led current has dropped 10% from the value measured at v cp - 1v. 5. total unadjusted error includes offset, full-scale and linearity errors. 6. the i2c host should allow at least 500s before sending data the AS3661after the rising edge of the enable line. table 4. electrical characteristics i 2 c 1 symbol parameter condition min typ max unit i 2 c mode timings - see f igure 3 on page 10 f sclk scl clock frequency 0 400 khz t buf bus free time between a stop and start condition 1.3 s t hd:sta hold time (repeated) start condition 2 0.6 s t low low period of scl clock 1.3 s t high high period of scl clock 0.6 s scl sda t buf t hd:sta t su:sta repeated start t su:sto t f t su:dat t high t hd:dat t r t low t hd:sta start stop ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 11 - 85 AS3661 datasheet - e l e c t r i c a l c h a r a c t e r i s t i c s t su:sta setup time for a repeated start condition 0.6 s t hd:dat data hold time 3 50 ns t su:dat data setup time 4 100 ns t r rise time of both sda and scl signals 20 + 0.1c b 300 ns t f fall time of both sda and scl signals 15+ 0.1c b 300 ns t su:sto setup time for stop condition 0.6 s c b capacitive load for each bus line load of one picofarad corresponds to one nanosecond. 10 200 ns c i/o i/o capacitance (sda, scl) 10 pf 1. specification is guaranteed by design and is not tested in production. v en = 1.65v to v bat . 2 . after this period the first clock pulse is generated. 3. a device must internally provide a hold time of at least 300ns for the sda signal (referred to the v ihmin of the scl signal) to bridge the undefined region of the falling edge of scl. 4. a fast-mode device can be used in a standard-mode system, but the requirement t su:dat = to 250ns must then be met. this is automatically the case if the device does not stretch the low period of the scl signal. if such a device does stretch the low period of the scl signal, it must output the next data bit to the sda line t r max + t su:dat = 1000 + 250 = 1250ns before the scl line is released. table 4. electrical characteristics (continued)i 2 c 1 symbol parameter condition min typ max unit ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 12 - 85 AS3661 datasheet - ty p i c a l o p e r a t i n g c h a r a c t e r i s t i c s 7 typical operating characteristics v bat = 3.6v, v en = 1.65v, c bat = c vcpout = 1.0f, c fly1-2 = 0.47f, t amb = +25oc, unless otherwise specified f igure 4. charge pump 1.5 x efficiency vs. load figure 5. output voltage vs. load current (1.5 x cp) 0 10 20 30 40 50 60 70 80 90 100 0 15 30 45 60 75 90 efficiency iload [ma] vbat = 2.7v vbat = 3.0v vbat = 3.3v vbat = 3.6v 3,2 3,4 3,6 3,8 4 4,2 4,4 0 15 30 45 60 75 90 105 120 output voltage iload [ma] vbat = 2.7v vbat = 3.0v vbat = 3.3v vbat = 3.6v figure 6. gain change hysteresis loop (6x1ma load) figure 7. effect of adap. hyst. on width of hyst. loop 2,5 2,7 2,9 3,1 3,3 3,5 3,7 3,9 4,1 4,3 4,5 2,6 2,8 3 3,2 3,4 3,6 3,8 4 vcp [v] vbat [v] vbat increasing vbat decreasing 6 x led multicomp ovs-0601 0 0,1 0,2 0,3 0,4 0,5 0,6 0 10 20 30 40 50 60 70 80 90 100 hysteresis [v] iload [ma] 400mv adaptive hysterese 200mv adaptive hysterese 200mv hysterese 400mv hysterese 6 x led multicomp ovs-0601 figure 8. led current matching distribution @17.5ma figure 9. led current accuracy distribution @17.5ma ?1 0 1 count 0 70 % total count: 610 parts ?2 0 2 count 0 60 % total count: 610 parts ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 13 - 85 AS3661 datasheet - ty p i c a l o p e r a t i n g c h a r a c t e r i s t i c s figure 10. power save mode supply current vs. v bat, charge pump in 1x mode figure 11. serial bus write and charge pump start- up, i load = 60ma 0 50 100 150 200 2,7 3,1 3,5 3,9 4,3 4,7 5,1 5,5 vbat [v] ibat [a] int ernal clk ext ernal clk 25s/div 2v/div sda v cp scl 2v/div 2v/div figure 12. line trans. and charge pump autom. gain change 1.5 to 1, 6leds@1ma 100% pwm figure 13. line trans. and charge pump autom. gain change 1 to 1.5, 6leds@1ma 100% pwm 2.5ms/div 500mv/div 500mv/div v bat v cp 2.8v 4.2v 3.6v 4.65v 3.8v 2.5ms/div 500mv/div 500mv/div v bat v cp 3.6v 3.6v 4v 2.8v figure 14. 100% pwm rgb led efficiency vs. vbat figure 15. 100% pwm wled efficiency vs. vbat 55 60 65 70 75 80 85 2,7 3,3 3,9 4,5 5,1 efficiency [%] vbat [v] 9x10ma 9x6.7ma 3 x led osram lrtb y3sg 55 60 65 70 75 80 85 90 95 2,7 3,2 3,7 4,2 4,7 efficiency [%] vbat [v] 6x15ma 6x10ma 6 x led multicomp ovs-0601 ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 14 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8 detailed description the AS3661 is a fully integrated lighting management unit for producing lighting effects for mobile devices. the a s3661 includes all necessary power management, high-side current sources, temperature compensation, two wire control interface and programmable pattern generators. the overall maximum current for each driver is set by an 8-bit register. the AS3661 controls led luminance with a pulse width modulation (pwm) scheme with a resolution of 12 bits. the temperature compensation is also done by a pwm. 8.1 programming the AS3661 provides flexibility and programmability for dimming and sequencing control. each led can be controlled d irectly and independently through the serial bus or led drivers can be grouped together for pre-programmed flashing patterns. the AS3661 has three independent program execution engines, so it is possible to form three independently programmable led banks. led drivers can be grouped based on their function so that, for example, the first bank of drivers can be assigned to the keypad illumination, the second bank to the funlights and the third group to the indicator led(s). each bank can contain 1 to 9 led driver outputs. instructions for program execution engines are stored in the program memory. the total amount of the program memory is 96 instructions and the user can allocate the memory as required by the engines. 8.2 led error detection AS3661 has a built-in led error detection. error detection does not only detect open and short circuit, but provides an o pportunity to measure the v f s of the leds. the test event is activated by a serial interface write and the result can be r ead through the serial interface during the next cycle. this feature can also be addressed to measure the voltage on vbat, vcp and int pins. typical example usage includes monitoring battery voltage or using int pin as a light sensor interface. 8.3 energy efficiency when charge pump automatic mode selection is enabled, the AS3661 monitors the voltage over the drivers of led1 to l ed6 so that the device can select the best charge pump gain and maintain good efficiency over the whole operating voltage range. the red led element of an rgb led typically has a forward voltage of about 2v. for that reason, the outputs led7, led8 and led9 are internally powered by vbat, since battery voltage is high enough to drive red leds over the whole operating voltage range. this allows to drive three rgb leds with good efficiency because the red leds doesn't load the charge pump. AS3661 is able to automatically enter power-save mode, when led outputs are not active and thus lowering idle current consumption down to 10 a (typ.). during the downtime of the pwm cycle (constant current output status is low) additional power savings can be achieved when the pwm power save feature is enabled. 8.4 temperature compensation the luminance of an led is typically a function of its temperature even though the current flowing through the led r emains constant. since luminance is temperature dependent, many led applications require some form of temperature compensation to decrease luminance and color purity variations due to temperature changes. the AS3661 has a build in temperature sensing element and pwm duty cycle of the led drivers changes linearly in relationship to changes in temperature. user can select the slope of the graph (31 slopes) based on the led characteristics. this compensation can be done either constantly, or only right after when the device wakes up from power save mode, to avoid error due to self-heating of the device. linear compensation is considered to be practical and accurate enough for most led applications. compensation is effective over the temperature range from -40c to +90c. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 15 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n figure 16. temperature compensation principle f igure 17. AS3661 - block diagram 0 25 50 75 100 -50 -25 0 25 50 75 100 temperature [c] efficiency [%] m ax. slope value no compensation m in. slope value ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 16 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.5 modes of operation the following are the different modes of operation of AS3661 8.5.1 reset in the reset mode all the internal registers are reset to the default values. reset is entered always if reset register ( 3dh) is written ffh or internal power on reset is active. power on reset (por) will activate during the chip startup or when the supply voltage v bat fall below 1.5v (typ.). once v bat rises above 1.5v (typ.) por will be inactivate and t he chip will continue to the standby mode. chip_en control bit is low after por by default. 8.5.2 standby the standby mode is entered if the register bit chip_en or en pin is logic low and reset is not active. this is the l ow power consumption mode, when all circuit functions are disabled. registers can be written in this mode if en pin is logic high so that the control bits will be effective right after the start up. 8.5.3 startup when chip_en bit is written high and the en pin is high, the internal startup sequence powers up all the n eeded internal blocks (v ref , bias, oscillator etc.). startup delay is 500 s. if the chip temperature rises too high, the t hermal shutdown (tsd) disables the chip operation and chip waits in startup mode until no thermal shutdown event is present. 8.5.4 normal during normal mode the user controls the chip using the control registers. 8.5.5 power save in power save mode analog blocks are disabled to minimize power consumption. ( see automatic power save mo de on page 19) figure 18. mode select ;" 
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www.austriamicrosystems.com revision 1.3 17 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.6 charge pump operational description 8.6.1 overview the AS3661 includes a pre-regulated switched-capacitor charge pump with a programmable voltage multiplication of 1 a nd 1.5x. in 1.5x mode by combining the principles of a switched-capacitor charge pump and a linear regulator, it generates a regulated 4.5v output from li-ion input voltage range. a two-phase non-overlapping clock generated internally controls the operation of the charge pump. during the charge phase, both flying capacitors (c fly1 and c fly2 ) a re charged from input voltage. in the pump phase that follows, the flying capacitors are discharged to output. a traditional switched capacitor charge pump operating in this manner will use switches with very low on-resistance, ideally 0 w , to generate an output voltage that is 1.5x the input voltage. the AS3661 regulates the output voltage by controlling the resistance of the input-connected pass-transistor switches in the charge pump. figure 19. charge pump 8.6.2 output resistance at lower input voltages, the charge pump output voltage may degrade due to effective output resistance (r out ) of the c harge pump. the expected voltage drop can be calculated by using a simple model for the charge pump illustrated in figure 20 below. fi gure 20. charge pump output resistance the model shows a linear pre-regulation block (reg), a voltage multiplier (1.5x), and an output resistance (r out ). the o utput resistance models the output voltage drop that is inherent to switched capacitor converters. the output resistance is 3.5 w (typ.), and it is a function of switching frequency, input voltage, flying capacitors capacitance value, internal resistances of the switches and esr of the flying capacitors. when the output voltage is in regulation, the regulator in the model controls the voltage v to keep the output voltage equal to 4.5v (typ.). with increased output current, the voltage drop across r out increases. to prevent drop in output voltage, the voltage drop across the r egulator is reduced, v increases, and v cp remains at 4.5v. when the output current increases to the point that there i s zero voltage drop across the regulator, v equals the input voltage, and the output voltage is on the edge of regulation. additional output current causes the output voltage to fall out of regulation, so that the operation is similar to a basic open-loop 1.5x charge pump. in this mode, output current results in output voltage drop proportional to the output resistance of the charge pump. the out-of-regulation output voltage can be approximated by: v cp = 1.5 x v in C i out x r out . v bat low noise charge pump 1:1, 1:1.5 modes c vcpout c fly2 c fly1 c bat vbat vcp c1+ c1- c2+ c2- 4.5v led1 v v mode switching led2 led9 . . . voltage limit up down 5.4v cp_max_5v4 vin 1.5x v 1.5x v rout reg vcp ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 18 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.6.3 controlling the charge pump the charge pump is controlled with two cp_mode bits in misc register (address 36h). when both of the bits are low, t he charge pump is disabled and the output voltage is pulled down with an internal 300 k w (typ.) resistor. the charge pump can be forced to bypass mode, so that the battery voltage is connected directly to the current sources. in 1.5x mode the output voltage is boosted to 4.5v. in automatic mode the charge pump operation mode is determined by saturation of constant current drivers, like described in chapter led forward voltage monitoring. 8.6.4 led forward voltage monitoring when the charge pump automatic mode selection is enabled, the voltages over the led drivers led1 to led6 are m onitored. note: power input for current source outputs led7, led8 and led9 are internally connected to the vbat pin. if the led1 to led6 drivers do not have enough headroom, the charge pump gain is set to 1.5x. driver saturation monitor does not have a fixed voltage limit, since saturation voltage is a function of temperature and current. the charge pump gain is set to 1x, when the battery voltage is high enough to supply all leds. in automatic gain change mode, the charge pump is switched to bypass mode (1x), when leds are inactive for over 50 ms. 8.6.5 gain change hysteresis the charge pump gain control utilizes digital filtering to prevent supply voltage disturbances (for example, the transient v oltage on the power supply during the gsm burst) from triggering unnecessary gain changes. hysteresis is provided to prevent periodic gain changes, which would occur due to led driver and charge pump voltage drop in 1x mode. the hysteresis of the gain change is user configurable, default setting is factory programmable. flexible configuration ensures, that the hysteresis can be minimized or set to desired level in each application. led forward voltage monitoring and gain control block diagram is shown in figure 21 . fi gure 21. forward voltage monitoring and gain control block 
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www.austriamicrosystems.com revision 1.3 19 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.6.6 automatic power save mode automatic power save mode is enabled when powersave_en bit in register address 36h is 1. almost all analog b locks are powered down in power save, if an external clock signal is used. only the charge pump protection circuits remain active. however, if the internal clock has been selected, only charge pump and led drivers are disabled during the power save; the digital part of the led controller needs stay active. in both cases the charge pump enters to the weak 1x mode. in this mode the charge pump utilizes a passive current limited keep-alive switch, which keeps the output voltage at the battery level. during the program execution AS3661 can enter power save if there is no pwm activity in any of the led driver outputs. to prevent short power save sequences during program execution, AS3661 has an instruction look-ahead filter. during program execution engine 1, engine 2 and engine 3 instructions are constantly analyzed, and if there is time intervals of more than 50ms in length with no pwm activity on led driver outputs, the device will enter power save. in power save mode program execution continues uninterruptedly. when an instruction that requires pwm activity is executed, a fast internal startup sequence will be started automatically. 8.6.7 pwm power save mode pwm cycle power save mode is enabled when register 36 bit [2] pwm_ps_en is set to '1'. in pwm power save mode a nalog blocks are powered down during the "down time" of the pwm cycle. blocks that are powered down depends whether external or internal clock is used. while the automatic power save mode (see above) saves energy when there is no pwm activity at all, the pwm power save mode saves energy during pwm cycles. like the automatic power save mode, pwm power save mode works also during program execution. figure 22. pwm powersave principle with external clock (vdd =3.6v, 50% pwm, i led9 =5ma) 1ms/div 2ma/div AS3661 input current 5ma/div led current input current ~3.5a during pwm powesave ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 20 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.7 led driver operational description AS3661 led drivers are constant current sources. the output current can be programmed by control registers up to 2 5.5 ma. the overall maximum current is set by 8-bit output current control registers with 100 a step size. each of the 9 led drivers has a separate output current control register. the led luminance pattern (dimming) is controlled with pwm (pulse width modulation) technique, which has internal resolution of 12 bits (8-bit control can be seen by user). pwm frequency is 312 hz (see figure 23 on page 20) . fi gure 23. led pattern and current control principle led dimming is controlled according to a logarithmic or linear scale (see figure 24) . logarithmic or linear scheme can b e set for both the program execution engine control and direct pwm control. figure 24. logarithmic vs. linear dimming note: if the temperature compensation is active, the maximum pwm duty cycle is limited to 50% at +25c. this is required to allow enough headroom for temperature compensation over the whole temperature range -40 c to 90c. 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 0 64 128 192 256 dimming control [dec] pwm output [%] linear pwm logarithmic pwm ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 21 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.7.1 powering leds although the AS3661 is very suitable for white led and general purpose applications, it is particularly well suited to u se with rgb leds. the AS3661 architecture is optimized for use with three rgb leds. typically, the red leds have forward voltages below 2v and thus red leds can be powered directly from v bat . in AS3661 the led7, led8 and l ed9 drivers are directly powered from the battery voltage (v bat ), not from the charge pump output. the led1 to l ed6 drivers are internally connected to the charge pump output and these outputs can be used for driving green and blue (v f = 2.7v to 3.7v) or white leds. of course, led7, led8 and led9 outputs can be used for green, blue or white l eds if the vbat voltage is high enough. an rgb led configuration example is given in the typical applications section. 8.7.2 controlling the high-side led drivers direct pwm control a ll AS3661 led drivers, led1 to led9, can be controlled independently through the two-wire serial i2c compati- ble interface. for each high-side driver there is a pwm control register. direct pwm control is active by default. controlling by program execution engines e ngine control is used when the user wants to create programmed sequences. the program execution engine has higher priority than direct control registers. therefore if the user has set to pwm register a certain value it will be automatically overridden when the program execution engine controls the driver. led control and program execu- tion engine operation is described in the chapter control register details. master fader control i n addition to led-by-led pwm register control, the AS3661 is equipped with so called master fader control, which allows the user to fade in or fade out multiple leds by writing to only one register. this is an useful function to minimize serial bus traffic between the mcu and the AS3661. the AS3661 has three master fader registers, so it is possible to form three master fader groups. master fader control can be used with the engines as well. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 22 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.8 i2c compatible control interface the AS3661 supports the i 2 c bus protocol. a device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. the device that controls the message is called a master. the devices that are controlled by the master are referred to as slaves. a master device that generates the serial clock (scl), controls the bus access, and generates the start and stop conditions must control the bus. the AS3661 operates as a slave on the i 2 c bus. within the bus specifications a standard mode (100khz maximum clock rate) and a fast mode (400khz maximum clock rate) are defined. the AS3661 works in both modes. connections to the bus are made through the open-drain i/o lines sda and scl table 5 8.8.1 i 2 c address selection the slave address can be selected depending on the connection of the two address selection pins asel0 and asel1. the selected address for reading and writing depending on the state of asel0 and asel1 can be found in table 5 b elow. the following bus protocol has been defined ( figure 25 ): data transfer may be initiated only when the bus is not busy. during data transfer, the data line must remain stable whenever the clock line is high. changes in the data line while the clock line is high are interpreted as control signals. accordingly, the following bus conditions have been defined: 8.8.2 bus not busy both data and clock lines remain high. 8.8.3 start data transfer a change in the state of the data line, from high to low, while the clock is high, defines a start condition. 8.8.4 stop data transfer a change in the state of the data line, from low to high, while the clock line is high, defines the stop condition. 8.8.5 data valid the state of the data line represents valid data when, after a start condition, the data line is stable for the duration of the high period of the clock signal. the data on the line must be changed during the low period of the clock signal. there is one clock pulse per bit of data. each data transfer is initiated with a start condition and terminated with a stop condition. the number of data bytes transferred between start and stop conditions are not limited, and are determined by the master device. the information is transferred byte-wise and each receiver acknowledges with a ninth bit. 8.8.6 acknowledge each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. the master device must generate an extra clock pulse that is associated with this acknowledge bit. table 5. chip address configuration asel1 asel0 address 8 bit hex address (hex) r/w gnd gnd 32 64/65 gnd v en 33 66/67 v en gnd 34 68/69 v en v en 35 6a/6b ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 23 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n a device that acknowledges must pull down the sda line during the acknowledge clock pulse in such a way that the sda line is stable low during the high period of the acknowledge-related clock pulse. of course, setup and hold times must be taken into account. a master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. in this case, the slave must leave the data line high to enable the master to generate the stop condition. figure 25. data transfer on i 2 c serial bus depending upon the state of the r/w bit, two types of data transfer are possible: 1. data transfer from a master transmitter to a slave receiver. the first byte transmitted by the master is the slave address. next follows a number of data bytes. the slave returns an acknowledge bit after each received byte. data is transferred with the most significant bit (msb) first. 2. data transfer from a slave transmitter to a master receiver. the master transmits the first byte (the slave address). the slave then returns an acknowledge bit, followed by the slave transmitting a number of data bytes. the master returns an acknowledge bit after all received bytes other than the last byte. at the end of the last received byte, a not acknowledge is returned. the master device generates all of the serial clock pulses and the start and stop conditions. a transfer is ended with a stop condition or with a repeated start condition. since a repeated start condition is also the beginning of the next serial transfer, the bus is not released. data is transferred with the most significant bit (msb) first. the AS3661 can operate in the following two modes: 1. slave receiver mode (write mode): serial data and clock are received through sda and scl. after each byte is received an acknowledge bit is transmitted. start and stop conditions are recognized as the begin- ning and end of a serial transfer. address recognition is performed by hardware after reception of the slave address and direction bit (see figure 26) . the slave address byte is the first byte received after the master generates the start condition. the slave address byte contains the 7-bit AS3661 address, which is 0110010 2 , followed by the direction bit (r/w), which, for a write, is 0. 3 after receiving and decoding the slave address byte the device outputs an acknowledge on the sda line. after the AS3661 acknowledges the slave address + write bit, the master transmits a register address to the AS3661. this sets the register pointer on the AS3661. the master may then transmit zero or more bytes of data (if more than one data byte is written see also blockwrite/read boundaries on page 24), with the AS3661 acknowledging each byte received. the 2. xxx depends on the external connection of asel0 and asel1; see chip address configuration on page 2 2 3. the address for writing to the AS3661 is 8xh = 011 00100b - see table 5 slave address acknowledgement signal from receiver acknowledgement signal from receiver repeated if more bytes are transferred stop condition or repeated start condition start condition scl sda msb r/w direction bit ack 1 2 6 7 8 9 1 2 3-8 8 9 ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 24 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n address pointer will increment after each data byte is transferred. the master generates a stop condition to terminate the data write. 2. slave transmitter mode (read mode): the first byte is received and handled as in the slave receiver mode. however, in this mode, the direction bit indicates that the transfer direction is reversed. serial data is transmit- ted on sda by the AS3661 while the serial clock is input on scl. start and stop conditions are recognized as the beginning and end of a serial transfer ( figure 26 and figure 27 ). the slave address byte is the first byte r eceived after the master generates a start condition. the slave address byte contains the 7-bit AS3661 address, which is 0110010, followed by the direction bit (r/w), which, for a read, is 1. 4 after receiving and decoding the slave address byte the device outputs an acknowledge on the sda line. the AS3661 then begins to transmit data starting with the register address pointed to by the register pointer (if more than one data byte is read see also blockwrite/read boundaries on page 24). if the register pointer is not written to before the initiation of a read mode the first address that is read is the last one stored in the register pointer. the AS3661 must receive a not acknowledge to end a read. figure 26. data write - slave receiver mode figure 27. data read (write pointer, then read) - slave receive and transmit 4. the address for read mode from the AS3661 is 8xh+1 = 01100101b - see table 5 s 0110010 0 a xxxxxxxx a a a xxxxxxxx xxxxxxxx a xxxxxxxx p s - start a - acknowledge (ack) p - stop data transferred (x + 1 bytes + acknowledge) s 0110010 0 a xxxxxxxx a 1 a 0110010 s - start sr - repeated start a - acknowledge (ack) p - stop na -not acknowledge (nack) xxxxxxxx a a a xxxxxxxx xxxxxxxx na xxxxxxxx p sr data transferred (x + 1 bytes + acknowledge) note: last data byte is followed by a nack ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 25 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.8.7 program downloading first the register page_select is set to the program page, which should be accessed. then the program page (part of or full page) can be downloaded to the registers cmd_0_msb , cmd_0_lsb , cmd_1_msb , cmd_1_lsb ... cmd_f_msb , cmd_f_lsb (i 2 c registers area 50h to 6fh). 8.9 register set the AS3661 is controlled by a set of registers through the two wire serial interface port. some register bits are reserved for future use. table below lists device registers, their addresses and their abbreviations. a more detailed description is given in chapter control register details. table 6. page_select register addr: 4fh page_select register bit bit name default access description 2:0 page_select 000b r/w selects program page for download 000 page 0 - addr 00h-0fh 001 page 1 - addr 10h-1fh 010 page 2 - addr 20h-2fh 011 page 3 - addr 30h-3fh 100 page 4 - addr 40h-4fh 101 page 5 - addr 50h-5fh 110 dont use 111 dont use table 7. description of registers hex address register name bit(s) type default value after reset description 00 enable / engine cntrl1 [6] r/w x0xxxxxx chip_en 0 AS3661 not enabled 1 AS3661 enabled [5:4] xx00xxxx engine1_exec engine 1 program execution control [3:2] xxxx00xx engine2_exec engine 2 program execution control [1:0] xxxxxx00 engine3_exec engine 3 program execution control 01 engine cntrl2 [5:4] r/w xx00xxxx engine1_mode engine 1 mode control [3:2] xxxx00xx engine2_mode engine 2 mode control [1:0] xxxxxx00 engine3_mode engine 3 mode control 02 output direct/ ratiometric msb [0] r/w xxxxxxx0 led9_ratio_en enables ratiometric dimming for led9 output ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 26 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 03 output direct/ ratiometric lsb [7] r/w 0xxxxxxx led8_ratio_en enables ratiometric dimming for led8 output [6] x0xxxxxx led7_ratio_en enables ratiometric dimming for led7 output [5] xx0xxxxx led6_ratio_en enables ratiometric dimming for led6 output [4] xxx0xxxx led5_ratio_en enables ratiometric dimming for led5 output [3] xxxx0xxx led4_ratio_en enables ratiometric dimming for led4 output [2] xxxxx0xx led3_ratio_en enables ratiometric dimming for led3 output [1] xxxxxx0x led2_ratio_en enables ratiometric dimming for led2 output [0] xxxxxxx0 led1_ratio_en enables ratiometric dimming for led1 output 04 output on/off control msb [0] r/w xxxxxxx1 led9_on on/off control for led9 output 05 output on / off control lsb [7] r/w 1xxxxxxx led8_on on/off control for led8 output [6] x1xxxxxx led7_on on/off control for led7 output [5] xx1xxxxx led6_on on/off control for led6 output [4] xxx1xxxx led5_on on/off control for led5 output [3] xxxx1xxx led4_on on/off control for led4 output [2] xxxxx1xx led3_on on/off control for led3 output [1] xxxxxx1x led2_on on/off control for led2 output [0] xxxxxxx1 led1_on on/off control for led1 output 06 led1 control [7:6] r/w 00xxxxxx mapping mapping for led1 output [5] xx0xxxxx log_en logarithmic dimming control for led1 [4:0] xxx00000 temp comp temperature compensation control for led1 output 07 led2 control [7:6] r/w 00xxxxxx mapping mapping for led2 output [5] xx0xxxxx log_en logarithmic dimming control for led2 output [4:0] xxx00000 temp comp temperature compensation control for led2 output table 7. description of registers hex address register name bit(s) type default value after reset description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 27 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 08 led3 control [7:6] r/w 00xxxxxx mapping mapping for led3 output [5] xx0xxxxx log_en logarithmic dimming control for led3 output [4:0] xxx00000 temp comp temperature compensation control for led3 output 09 led4 control [7:6] r/w 00xxxxxx mapping mapping for led4 output [5] xx0xxxxx log_en logarithmic dimming control for led4 output [4:0] xxx00000 temp comp temperature compensation control for led4 output 0a led5 control [7:6] r/w 00xxxxxx mapping mapping for led5 output [5] xx0xxxxx log_en logarithmic dimming control for led5 output [4:0] xxx00000 temp comp temperature compensation control for led5 output 0b led6 control [7:6] r/w 00xxxxxx mapping mapping for led6 output [5] xx0xxxxx log_en logarithmic dimming control for led6 output [4:0] xxx00000 temp comp temperature compensation control for led6 output 0c led7 control [7:6] r/w 00xxxxxx mapping mapping for led7 output [5] xx0xxxxx log_en logarithmic dimming control for led7 output [4:0] xxx00000 temp comp temperature compensation control for led7 output 0d led8 control [7:6] r/w 00xxxxxx mapping mapping for led8 output [5] xx0xxxxx log_en logarithmic dimming control for led8 output [4:0] xxx00000 temp comp temperature compensation control for led8 output 0e led9 control [7:6] r/w 00xxxxxx mapping mapping for led9 output [5] xx0xxxxx log_en logarithmic dimming control for led9 output [4:0] xxx00000 temp comp temperature compensation control for led9 output 0f to 15 [7:0] reserved 16 led1 pwm [7:0] r/w 00000000 pwm duty cycle control for led1 17 led2 pwm [7:0] r/w 00000000 pwm duty cycle control for led2 18 led3 pwm [7:0] r/w 00000000 pwm duty cycle control for led3 table 7. description of registers hex address register name bit(s) type default value after reset description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 28 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 19 led4 pwm [7:0] r/w 00000000 pwm duty cycle control for led4 1a led5 pwm [7:0] r/w 00000000 pwm duty cycle control for led5 1b led6 pwm [7:0] r/w 00000000 pwm duty cycle control for led6 1c led7 pwm [7:0] r/w 00000000 pwm duty cycle control for led7 1d led8 pwm [7:0] r/w 00000000 pwm duty cycle control for led8 1e led9 pwm [7:0] r/w 00000000 pwm duty cycle control for led9 1f to 25 [7:0] reserved 26 led1 current control [7:0] r/w 10101111 current led1 output current control register. default 17.5 ma (typ.) 27 led2 current control [7:0] r/w 10101111 current led2 output current control register. default 17.5 ma (typ.) 28 led3 current control [7:0] r/w 10101111 current led3 output current control register. default 17.5 ma (typ.) 29 led4 current control [7:0] r/w 10101111 current led4 output current control register. default 17.5 ma (typ.) 2a led5 current control [7:0] r/w 10101111 current led5 output current control register. default 17.5 ma (typ.) 2b led6 current control [7:0] r/w 10101111 current led6 output current control register. default 17.5 ma (typ.) 2c led7 current control [7:0] r/w 10101111 current led7 output current control register. default 17.5 ma (typ.) 0x2d led8 current control [7:0] r/w 10101111 current led8 output current control register. default 17.5 ma (typ.) 0x2e led9 current control [7:0] r/w 10101111 current led9 output current control register. default 17.5 ma (typ.) 2f to 35 [7:0] reserved table 7. description of registers hex address register name bit(s) type default value after reset description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 29 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 36 misc [7] r/w 0xxxxxxx variable_d_sel variable led source selection [6] x1xxxxxx en_auto_incr serial bus address auto increment enable [5] xx0xxxxx powersave_en powersave mode enable [4:3] xxx00xxx cp_mode charge pump gain selection [2] xxxxx0xx pwm_ps_en pwm cycle powersave enable [1] xxxxxx0x clk_det_en external clock detection [0] xxxxxxx0 int_clk_en clock source selection 37 engine1 pc [6:0] r/w x0000000 pc program counter for engine 1 38 engine2 pc [6:0] r/w x0000000 pc program counter for engine 2 39 engine3 pc [6:0] r/w x0000000 pc program counter for engine 3 3a status / interrupt [7] r 0xxxxxxx ledtest_meas_done indicates when the led test measurement is done. [6] x1xxxxxx mask_busy mask bit for interrupts generated by startup_busy or engine_busy [5] xx0xxxxx startup_busy this bit indicates that the start-up sequence is running [4] xxx0xxxx engine_busy this bit indicates that a program execution engine is clearing internal registers [3] xxxx0xxx ext_clk_used indicates when external clock signal is in use [2] xxxxx0xx eng1_int interrupt bit for program execution engine 1 [1] xxxxxx0x eng2_int interrupt bit for program execution engine 2 [0] xxxxxxx0 eng3_int interrupt bit for program execution engine 3 3b gpo [2] r/w xxxxx0xx int_conf int pin can be configured to function as a gpo with this bit [1] xxxxxx0x gpo pin control [0] xxxxxxx0 int_gpo gpo pin control for int pin (when int_conf is set "1") 3c variable [7:0] r/w 00000000 variable global 8-bit variable table 7. description of registers hex address register name bit(s) type default value after reset description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 30 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 3d reset [7:0] r/w 00000011 reset writing 11111111 into this register resets the AS3661 3e temp adc control [7] r 0xxxxxxx temp_meas_busy indicates when temperature measurement is active [2] r/w xxxxx0xx en_temp_sensor reads the internal temperature sensor once [1] xxxxxx0x continuous_conv continuous temperature measurement selection [0] xxxxxxx0 sel_ext_temp internal/external temperature sensor selection 3f temperature read [7:0] r 00011001 temperature bits for temperature information 40 temperature write [7:0] r/w 0000000 temperature bits for temperature information 41 led test control [7] r/w 0xxxxxxx en_led_test_adc [6] x0xxxxxx en_led_test_int [5] xx0xxxxx continuous_conv continuous led test measurement selection [4:0] xxx00000 led_test_ctrl control bits for led test 42 led test adc [7:0] r n/a led_test_adc led test result 43 [7:0] reserved 44 [7:0] reserved 45 engine1 variable a [7:0] r 00000000 variable for engine1 46 engine2 variable a [7:0] r 00000000 variable for engine2 47 engine3 variable a [7:0] r 00000000 variable for engine3 48 master fader1 [7:0] r/w 00000000 master fader 1 49 master fader2 [7:0] r/w 00000000 master fader 2 4a master fader3 [7:0] r/w 00000000 master fader 3 4b [7:0] reserved 4c eng1 prog start addr [6:0] r/w x0000000 engine 1 program start address 4d eng2 prog start addr [6:0] r/w x0001000 engine 2 program start address 4e eng3 prog start addr [6:0] r/w x0010000 engine 3 program start address 4f prog mem page sel [2:0] r/w xxxxx000 page_sel table 7. description of registers hex address register name bit(s) type default value after reset description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 31 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 50 program memory 00h/10h/20h/30h/ 40h/50h [15:8] r/w 00000000 cmd every instruction is 16Cbit width. the AS3661 can store 96 instructions. each instruction consists of 16 bits. because one register has only 8 bits, one instruction requires two register addresses. in order to reduce program load time the AS3661 supports address auto-incrementation. register address is incremented after each 8 data bits. thus the whole program memory page can be written in one serial bus write sequence. 51 [7:0] 00000000 52 program memory 01h/11h/21h/31h/ 41h/51h [15:8] r/w 00000000 53 [7:0] 00000000 54 program memory 02h/12h/22h/32h/ 42h/52h [15:8] r/w 00000000 55 [7:0] 00000000 56 program memory 03h/13h/23h/33h/ 43h/53h [15:8] r/w 00000000 57 [7:0] 00000000 table 7. description of registers hex address register name bit(s) type default value after reset description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 32 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 58 program memory 04h/14h/24h/34h/ 44h/54h [15:8] r/w 00000000 cmd every instruction is 16Cbit width. the AS3661 can store 96 instructions. each instruction consists of 16 bits. because one register has only 8 bits, one instruction requires two register addresses. in order to reduce program load time the AS3661 supports address auto-incrementation. register address is incremented after each 8 data bits. thus the whole program memory page can be written in one serial bus write sequence. 59 [7:0] 00000000 5a program memory 05h/15h/25h/35h/ 45h/55h [15:8] r/w 00000000 5b [7:0] 00000000 5c program memory 06h/16h/26h/36h/ 46h/56h [15:8] r/w 00000000 5d [7:0] 00000000 5e program memory 07h/17h/27h/37h/ 47h/57h [15:8] r/w 00000000 5f [7:0] 00000000 60 program memory 08h/18h/28h/38h/ 48h/58h [15:8] r/w 00000000 61 [7:0] 00000000 62 program memory 09h/19h/29h/39h/ 49h/59h [15:8] r/w 00000000 63 [7:0] 00000000 64 program memory 0ah/1ah/2ah/3ah/ 4ah/5ah [15:8] r/w 00000000 65 [7:0] 00000000 66 program memory 0bh/1bh/2bh/3bh/ 4bh/5bh [15:8] r/w 00000000 67 [7:0] 00000000 68 program memory 0ch/1ch/2ch/ 3ch/4ch/5ch [15:8] r/w 00000000 69 [7:0] 00000000 6a program memory 0dh/1dh/2dh/36d/ 46d/5dh [15:8] r/w 00000000 6b [7:0] 00000000 6c program memory 0eh/1eh/2eh/3eh/ 4eh/5eh [15:8] r/w 00000000 6d [7:0] 00000000 6e program memory 0fh/1fh/2fh/3fh/ 4fh/5fh [15:8] r/w 00000000 6f [7:0] 00000000 70 eng1 mapping msb [7] r 0xxxxxxx gpo engine 1 mapping information, gpo pin [0] xxxxxxx0 d9 engine 1 mapping information, d9 output table 7. description of registers hex address register name bit(s) type default value after reset description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 33 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 71 eng1 mapping lsb [7] r 0xxxxxxx led8 engine 1 mapping information, led8 output [6] x0xxxxxx led7 engine 1 mapping information, led7 output [5] xx0xxxxx led6 engine 1 mapping information, led6 output [4] xxx0xxxx led5 engine 1 mapping information, led5 output [3] xxxx0xxx led4 engine 1 mapping information, led4 output [2] xxxxx0xx led3 engine 1 mapping information, led3 output [1] xxxxxx0x led2 engine 1 mapping information, led2 output [0] xxxxxxx0 led1 engine 1 mapping information, led1 output 72 eng2 mapping msb [7] r 0xxxxxxx gpo engine 2 mapping information, gpo pin [0] xxxxxxx0 led9 engine 2 mapping information, d9 output 73 eng2 mapping lsb [7] r 0xxxxxxx led8 engine 2 mapping information, led8 output [6] x0xxxxxx led7 engine 2 mapping information, led7 output [5] xx0xxxxx led6 engine 2 mapping information, led6 output [4] xxx0xxxx led5 engine 2 mapping information, led5 output [3] xxxx0xxx led4 engine 2 mapping information, led4 output [2] xxxxx0xx led3 engine 2 mapping information, led3 output [1] xxxxxx0x led2 engine 2 mapping information, led2 output [0] xxxxxxx0 led1 engine 2 mapping information, led1 output 74 eng3 mapping msb [7] r 0xxxxxxx gpo engine 3 mapping information, gpo pin [0] xxxxxxx0 led9 engine 3 mapping information, led9 output table 7. description of registers hex address register name bit(s) type default value after reset description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 34 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 75 eng3 mapping lsb [7] r 0xxxxxxx led8 engine 3 mapping information, led8 output [6] x0xxxxxx led7 engine 3 mapping information, led7 output [5] xx0xxxxx led6 engine 3 mapping information, led6 output [4] xxx0xxxx led5 engine 3 mapping information, led5 output [3] xxxx0xxx led4 engine 3 mapping information, led4 output [2] xxxxx0xx led3 engine 3 mapping information,led3 output [1] xxxxxx0x led2 engine 3 mapping information, led2 output [0] xxxxxxx0 led1 engine 3 mapping information, led1 output 76 gain change ctrl [7:6] r/w 00xxxxxx treshold threshold voltage (typ.) 00 400mv 01 300mv 10 200mv 11 100mv [5] r/w xx0xxxxx adaptive_tresh_en activates adaptive threshold. [4:3] r/w xxx00xxx timer 00 5ms 01 10ms 10 50ms 11 infinite [2] r/w xxxxx0xx force_1x activates 1.5x to 1x timer table 7. description of registers hex address register name bit(s) type default value after reset description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 35 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10 control register details 8.10.1 enable/ engine control1 this register controls the startup of the chip and the program execution modes for each program execution engine. table 8. enable / engine cntr 1 register register: 0x00 enable / engine cntr1 bit bit name default access bit description 6 chip_en 0 r/w 0: standby mode is entered. still, control registers can be written or read, excluding bits [5:0] in reg 00 (this register), registers 16h to 1e (led pwm registers) and 37h to 39h (program counters). 1: internal startup sequence powers up all the needed internal blocks and the device enters normal mode. 5:4 engine1_exec 00 r/w the engine 1 program execution control register bits define how the program is executed. program start address can be programmed to program counter (pc) register 0x37. 00: hold causes the execution engine to finish the current instruction and then stop. program counter (pc) can be read or written only in this mode. 01: execute the instruction at the location pointed by the pc, increment the pc by one and then reset eng1_exec bits to 00 (i.e. enter hold). 10: start program execution from the location pointed by the pc. this mode is also called free run mode. 11: execute the instruction pointed by the current pc value and reset eng1_exec to 00 (i.e. enter hold). the difference between step and execute once is that execute once does not increment the pc. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 36 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.2 engine cntrl2 the AS3661 supports up to four different operation modes which are defined in these registers. disabled : engines can be configured to disabled mode each one separately. load program: writing to program memory is allowed only when the engine is in load program operation mode and engine busy bit (reg 3a) is not set. serial bus master should check the busy bit before writing to program memory. all the three engines are in hold while one or more engines are in load program mode. pwm values are frozen, also. program execution continues when all the engines are out of load program mode. load program mode resets the program counter of the respective engine. load program mode can be entered from the disabled mode only. entering load program mode from the run program mode is not allowed. run program: run program mode executes the instructions stored in the program memory. execution register (eng1_exec etc.) bits define how the program is executed (hold, step, free run or execute once). program start address can be programmed to the program counter (pc) register. the program counter is reset to zero when the pcs upper limit value is reached. halt: instruction execution aborts immediately and engine operation halts. 3:2 engine2_exec 00 r/w the engine 2 program execution control register bits define how the program is executed. program start address can be programmed to program counter (pc) register 0x38. 00: hold causes the execution engine to finish the current instruction and then stop. program counter (pc) can be read or written only in this mode. 01: execute the instruction at the location pointed by the pc, increment the pc by one and then reset eng2_exec bits to 00 (i.e. enter hold). 10: start program execution from the location pointed by the pc. this mode is also called free run mode. 11: execute the instruction pointed by the current pc value and reset eng2_exec to 00 (i.e. enter hold). the difference between step and execute once is that execute once does not increment the pc. 1:0 engine3_exec 00 r/w the engine 3 program execution control register bits define how the program is executed. program start address can be programmed to program counter (pc) register 0x39. 00: hold causes the execution engine to finish the current instruction and then stop. program counter (pc) can be read or written only in this mode. 01: executes the instruction at the location pointed by the pc, increment the pc by one and then reset eng3_exec bits to 00 (i.e. enter hold). 10: start program execution from the location pointed by the pc. this mode is also called free run mode. 11: execute the instruction pointed by the current pc value and reset eng3_exec to 00 (i.e. enter hold). the difference between step and execute once is that execute once does not increment the pc. table 8. enable / engine cntr 1 register register: 0x00 enable / engine cntr1 bit bit name default access bit description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 37 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.3 output direct/ratiometric msb and lsb a particular feature of the AS3661 is the ratiometric up/down dimming of the rgb-leds. in other words, the led driver pwm output will vary in a ratiometric manner. by a ratiometric approach the emitted color of an rgbCled remains the same regardless of the initial magnitudes of the r/g/b pwm outputs. for example, if the pwm output of the red led output is doubled, the output of green led is doubled also. table 9. engine cntrl2 register register: 0x01 engine cntrl2 bit bit name default access bit description 5:4 engine1_mode 00 r/w 00: disabled 01: load program to sram, reset engine 1 pc 10: run program as defined by engine1_exec bits 11: halts the engine 3:2 engine2_mode 00 r/w 00: disabled 01: load program to sram, reset engine 2 pc 10: run program as defined by engine2_exec bits 11: halts the engine 1:0 engine3_mode 00 r/w 00: disabled 01: load program to sram, reset engine 3 pc 10: run program as defined by engine3_exec bits 11: halts the engine table 10. output direct / ratiometric msb register register: 0x02 output direct/ratiometric msb bit bit name default access bit description 0 led9_ratio_en 0 r/w 0: disables ratiometric dimming for led9 output. 1: enables ratiometric dimming for led9 output. table 11. output direct / ratiometric lsb register register: 0x03 output direct/ratiometric lsb bit bit name default access bit description 7 led8_ratio_en 0 r/w 0: disables ratiometric dimming for led8 output. 1: enables ratiometric dimming for led9 output. 6 led7_ratio_en 0 r/w 0: disables ratiometric dimming for led7 output. 1: enables ratiometric dimming for led9 output. 5 led6_ratio_en 0 r/w 0: disables ratiometric dimming for led6 output. 1: enables ratiometric dimming for led9 output. 4 led5_ratio_en 0 r/w 0: disables ratiometric dimming for led5 output. 1: enables ratiometric dimming for led9 output. 3 led4_ratio_en 0 r/w 0: disables ratiometric dimming for led4 output. 1: enables ratiometric dimming for led9 output. 2 led3_ratio_en 0 r/w 0: disables ratiometric dimming for led3 output. 1: enables ratiometric dimming for led9 output. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 38 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.4 output on/off control msb and lsb the following two registers allow the user to switch all nine current sources independently from each other on and off. please mind that this selection will be overridden if a current source is selected by one of the program execution engines. 1 led2_ratio_en 0 r/w 0: disables ratiometric dimming for led2 output. 1: enables ratiometric dimming for led9 output. 0 led1_ratio_en 0 r/w 0: disables ratiometric dimming for led1 output. 1: enables ratiometric dimming for led9 output. table 12. output on/off control msb register register: 0x04 output on/off control msb bit bit name default access bit description 0 led9_on 0 r/w 0: led9 output off. 1: led9 output on. table 13. output on/off control lsb register register: 0x05 output on/off control lsb bit bit name default access bit description 7 led8_on 0 r/w 0: led8 output off. 1: led8 output on. 6 led7_on 0 r/w 0: led7 output off. 1: led7 output on. 5 led6_on 0 r/w 0: led6 output off. 1: led6 output on. 4 led5_on 0 r/w 0: led5 output off. 1: led5 output on. 3 led4_on 0 r/w 0: led4 output off. 1: led4 output on. 2 led3_on 0 r/w 0: led3 output off. 1: led3 output on. 1 led2_on 0 r/w 0: led2 output off. 1: led2 output on. 0 led1_on 0 r/w 0: led1 output off. 1: led1 output on. table 11. output direct / ratiometric lsb register register: 0x03 output direct/ratiometric lsb bit bit name default access bit description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 39 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.5 ledx control these registers are used to assign the any current source output to the master fader group 1, 2, or 3, or none of them. also, the registers set the slope of the current sources output temperature compensation line and selects between linear and logarithmic pwm brightness adjustment. by using logarithmic pwm-scale the visual effect looks like linear. when the logarithmic adjustment is enabled, the chip handles internally pwm values with 12-bit resolution. this allows very fine-grained pwm control at low pwm duty cycles. if a master fader is selected for an output, the duty cycle on the output will be led1 pwm register value (address 0x16) multiplied with the value in the master fader register. besides the led mapping and linear or logarithmic selection it is also possible to do a temperature compensation for each output separately. the pwm duty cycle at temperature t (in centigrade) can be obtained as follows: pwm f = [pwm s - (25 - t) * slope * pwms] / 2, where pwmf is the final duty cycle at temperature t, pwm s is the set pwm duty cycle (pwm duty cycle is set in registers 16h to 1eh) and the value of the correction factor is obtained from table 8 . f or example, if the set pwm duty cycle in register 16h is 90%, temperature t is -10c and the chosen s lope is +1.5 1/ c, the final duty cycle pwmf for led1 output will be [90% - (25c - (-10c))* 1.5 1/c * 90%]/2 = [90 % - 35 * 1.5 * 90%]/2 = 21.4%. default setting 00000 means that the temperature compensation is non-active and the pwm output (0 to 100%) is set solely by pwm registers led1 pwm to led9 pwm. table 14. led1 control register register: 0x06 led1 control bit bit name default access bit description 7:6 led1_mapping 00 r/w this register defines the mapping of led1 output to the master faders. the faders can either be used for dimming several leds in parallel or for ratiometric control of the output. 00: no master fader selected 01: master fader 1 controls led1 output 10: master fader 2 controls led1 output 11: master fader 3 controls led1 output 5 led1_log_en 0 r/w this bit is effective for both, program execution engine and direct pwm control. 0: linear adjustment. 1: logarithmic adjustment. 4:0 led1_temp_comp 0 0000 r/w the reference temperature is +25c (i.e. the temper ature at which all slope settings have no effect) and the temperature coefficient (slope) can be set in 0.1 1/c steps to any value between -1.5 1/c and +1.5 1/c, with a default to 0.0 1/c 11111: -1.5 1/c 11110: -1.4 1/c ... 00000: temperature compensation not activated ... 01110: +1.4 1/c 01111: +1.5 1/c ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 40 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n table 15. led2 control register register: 0x07 led2 control bit bit name default access bit description 7:6 led2_mapping 00 r/w this register defines the mapping of led2 output to the master faders. the faders can either be used for dimming several leds in parallel or for ratiometric control of the output. 00: no master fader selected 01: master fader 1 controls led2 output 10: master fader 2 controls led2 output 11: master fader 3 controls led2 output 5 led2_log_en 0 r/w this bit is effective for both, program execution engine and direct pwm control. 0: linear adjustment. 1: logarithmic adjustment. 4:0 led2_temp_comp 0 0000 r/w the reference temperature is +25c (i.e. the temper ature at which all slope settings have no effect) and the temperature coefficient (slope) can be set in 0.1 1/c steps to any value between -1.5 1/c and +1.5 1/c, with a default to 0.0 1/c 11111: -1.5 1/c 11110: -1.4 1/c ... 00000: temperature compensation not activated ... 01110: +1.4 1/c 01111: +1.5 1/c table 16. led3 control register register: 0x08 led3 control bit bit name default access bit description 7:6 led3_mapping 00 r/w this register defines the mapping of led3 output to the master faders. the faders can either be used for dimming several leds in parallel or for ratiometric control of the output. 00: no master fader selected 01: master fader 1 controls led3 output 10: master fader 2 controls led3 output 11: master fader 3 controls led3 output ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 41 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 5 led3_log_en 0 r/w this bit is effective for both, program execution engine and direct pwm control. 0: linear adjustment. 1: logarithmic adjustment. 4:0 led3_temp_comp 0 0000 r/w the reference temperature is +25c (i.e. the temper ature at which all slope settings have no effect) and the temperature coefficient (slope) can be set in 0.1 1/c steps to any value between -1.5 1/c and +1.5 1/c, with a default to 0.0 1/c 11111: -1.5 1/c 11110: -1.4 1/c ... 00000: temperature compensation not activated ... 01110: +1.4 1/c 01111: +1.5 1/c table 17. led4 control register register: 0x09 led1 control bit bit name default access bit description 7:6 led4_mapping 00 r/w this register defines the mapping of led4 output to the master faders. the faders can either be used for dimming several leds in parallel or for ratiometric control of the output. 00: no master fader selected 01: master fader 1 controls led4 output 10: master fader 2 controls led4 output 11: master fader 3 controls led4 output 5 led4_log_en 0 r/w this bit is effective for both, program execution engine and direct pwm control. 0: linear adjustment. 1: logarithmic adjustment. 4:0 led4_temp_comp 0 0000 r/w the reference temperature is +25c (i.e. the temper ature at which all slope settings have no effect) and the temperature coefficient (slope) can be set in 0.1 1/c steps to any value between -1.5 1/c and +1.5 1/c, with a default to 0.0 1/c 11111: -1.5 1/c 11110: -1.4 1/c ... 00000: temperature compensation not activated ... 01110: +1.4 1/c 01111: +1.5 1/c table 16. led3 control register register: 0x08 led3 control bit bit name default access bit description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 42 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n table 18. led5 control register register: 0x0a led1 control bit bit name default access bit description 7:6 led5_mapping 00 r/w this register defines the mapping of led5 output to the master faders. the faders can either be used for dimming several leds in parallel or for ratiometric control of the output. 00: no master fader selected 01: master fader 1 controls led5 output 10: master fader 2 controls led5 output 11: master fader 3 controls led5 output 5 led5_log_en 0 r/w this bit is effective for both, program execution engine and direct pwm control. 0: linear adjustment. 1: logarithmic adjustment. 4:0 led5_temp_comp 0 0000 r/w the reference temperature is +25c (i.e. the temper ature at which all slope settings have no effect) and the temperature coefficient (slope) can be set in 0.1 1/c steps to any value between -1.5 1/c and +1.5 1/c, with a default to 0.0 1/c 11111: -1.5 1/c 11110: -1.4 1/c ... 00000: temperature compensation not activated ... 01110: +1.4 1/c 01111: +1.5 1/c table 19. led6 control register register: 0x0b led6 control bit bit name default access bit description 7:6 led6_mapping 00 r/w this register defines the mapping of led6 output to the master faders. the faders can either be used for dimming several leds in parallel or for ratiometric control of the output. 00: no master fader selected 01: master fader 1 controls led6 output 10: master fader 2 controls led6 output 11: master fader 3 controls led6 output ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 43 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 5 led6_log_en 0 r/w this bit is effective for both, program execution engine and direct pwm control. 0: linear adjustment. 1: logarithmic adjustment. 4:0 led6_temp_comp 0 0000 r/w the reference temperature is +25c (i.e. the temper ature at which all slope settings have no effect) and the temperature coefficient (slope) can be set in 0.1 1/c steps to any value between -1.5 1/c and +1.5 1/c, with a default to 0.0 1/c 11111: -1.5 1/c 11110: -1.4 1/c ... 00000: temperature compensation not activated ... 01110: +1.4 1/c 01111: +1.5 1/c table 20. led7 control register register: 0x0c led7 control bit bit name default access bit description 7:6 led7_mapping 00 r/w this register defines the mapping of led7 output to the master faders. the faders can either be used for dimming several leds in parallel or for ratiometric control of the output. 00: no master fader selected 01: master fader 1 controls led7 output 10: master fader 2 controls led7 output 11: master fader 3 controls led7 output 5 led7_log_en 0 r/w this bit is effective for both, program execution engine and direct pwm control. 0: linear adjustment. 1: logarithmic adjustment. 4:0 led7_temp_comp 0 0000 r/w the reference temperature is +25c (i.e. the temper ature at which all slope settings have no effect) and the temperature coefficient (slope) can be set in 0.1 1/c steps to any value between -1.5 1/c and +1.5 1/c, with a default to 0.0 1/c 11111: -1.5 1/c 11110: -1.4 1/c ... 00000: temperature compensation not activated ... 01110: +1.4 1/c 01111: +1.5 1/c table 19. led6 control register register: 0x0b led6 control bit bit name default access bit description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 44 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n table 21. led8 control register register: 0x0d led8 control bit bit name default access bit description 7:6 led8_mapping 00 r/w this register defines the mapping of led8 output to the master faders. the faders can either be used for dimming several leds in parallel or for ratiometric control of the output. 00: no master fader selected 01: master fader 1 controls led8 output 10: master fader 2 controls led8 output 11: master fader 3 controls led8 output 5 led8_log_en 0 r/w this bit is effective for both, program execution engine and direct pwm control. 0: linear adjustment. 1: logarithmic adjustment. 4:0 led8_temp_comp 0 0000 r/w the reference temperature is +25c (i.e. the temper ature at which all slope settings have no effect) and the temperature coefficient (slope) can be set in 0.1 1/c steps to any value between -1.5 1/c and +1.5 1/c, with a default to 0.0 1/c 11111: -1.5 1/c 11110: -1.4 1/c ... 00000: temperature compensation not activated ... 01110: +1.4 1/c 01111: +1.5 1/c table 22. led9 control register register: 0x0e led9 control bit bit name default access bit description 7:6 led9_mapping 00 r/w this register defines the mapping of led9 output to the master faders. the faders can either be used for dimming several leds in parallel or for ratiometric control of the output. 00: no master fader selected 01: master fader 1 controls led9 output 10: master fader 2 controls led9 output 11: master fader 3 controls led9 output ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 45 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.6 ledx pwm this is the pwm duty cycle control for led1 to led9 output. the pwm registers are effective during direct control operation. direct pwm control is active after power up by default. note: serial bus address auto increment is not supported for register addresses from 16 to 1e. note: if the temperature compensation is active, the maximum pwm duty cycle is 50% at +25c. this is require d to allow enough headroom for temperature compensation over the temperature range -40 c to 90c. 5 led9_log_en 0 r/w this bit is effective for both, program execution engine and direct pwm control. 0: linear adjustment. 1: logarithmic adjustment. 4:0 led8_temp_comp 0 0000 r/w the reference temperature is +25c (i.e. the temper ature at which all slope settings have no effect) and the temperature coefficient (slope) can be set in 0.1 1/c steps to any value between -1.5 1/c and +1.5 1/c, with a default to 0.0 1/c 11111: -1.5 1/c 11110: -1.4 1/c ... 00000: temperature compensation not activated ... 01110: +1.4 1/c 01111: +1.5 1/c table 23. led1 pwm register register: 0x16 led1 pwm bit bit name default access bit description 7:0 led1_pwm 0000 0000 r/w this register controls the duty cycle of led1 pwm output. 0000 0000: 0% duty cycle 0000 0001: 0.3921% duty cycle 0000 0010: 0.7843% duty cycle 0000 0011: 1.1765% duty cycle .... 1111 1111: 100% duty cycle table 22. led9 control register register: 0x0e led9 control bit bit name default access bit description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 46 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n table 24. led2 pwm register register: 0x17 led2 pwm bit bit name default access bit description 7:0 led2_pwm 0000 0000 r/w this register controls the duty cycle of led2 pwm output. 0000 0000: 0% duty cycle 0000 0001: 0.3921% duty cycle 0000 0010: 0.7843% duty cycle 0000 0011: 1.1765% duty cycle .... 1111 1111: 100% duty cycle table 25. led3 pwm register register: 0x18 led3 pwm bit bit name default access bit description 7:0 led3_pwm 0000 0000 r/w this register controls the duty cycle of led3 pwm output. 0000 0000: 0% duty cycle 0000 0001: 0.3921% duty cycle 0000 0010: 0.7843% duty cycle 0000 0011: 1.1765% duty cycle .... 1111 1111: 100% duty cycle table 26. led4 pwm register register: 0x19 led4 pwm bit bit name default access bit description 7:0 led4_pwm 0000 0000 r/w this register controls the duty cycle of led4 pwm output. 0000 0000: 0% duty cycle 0000 0001: 0.3921% duty cycle 0000 0010: 0.7843% duty cycle 0000 0011: 1.1765% duty cycle .... 1111 1111: 100% duty cycle table 27. led5 pwm register register: 0x1a led5 pwm bit bit name default access bit description 7:0 led5_pwm 0000 0000 r/w this register controls the duty cycle of led5 pwm output. 0000 0000: 0% duty cycle 0000 0001: 0.3921% duty cycle 0000 0010: 0.7843% duty cycle 0000 0011: 1.1765% duty cycle .... 1111 1111: 100% duty cycle ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 47 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n table 28. led6 pwm register register: 0x1b led6 pwm bit bit name default access bit description 7:0 led6_pwm 0000 0000 r/w this register controls the duty cycle of led6 pwm output. 0000 0000: 0% duty cycle 0000 0001: 0.3921% duty cycle 0000 0010: 0.7843% duty cycle 0000 0011: 1.1765% duty cycle .... 1111 1111: 100% duty cycle table 29. led7 pwm register register: 0x1c led7 pwm bit bit name default access bit description 7:0 led7_pwm 0000 0000 r/w this register controls the duty cycle of led7 pwm output. 0000 0000: 0% duty cycle 0000 0001: 0.3921% duty cycle 0000 0010: 0.7843% duty cycle 0000 0011: 1.1765% duty cycle .... 1111 1111: 100% duty cycle table 30. led8 pwm register register: 0x1d led8 pwm bit bit name default access bit description 7:0 led8_pwm 0000 0000 r/w this register controls the duty cycle of led8 pwm output. 0000 0000: 0% duty cycle 0000 0001: 0.3921% duty cycle 0000 0010: 0.7843% duty cycle 0000 0011: 1.1765% duty cycle .... 1111 1111: 100% duty cycle table 31. led9 pwm register register: 0x1e led9 pwm bit bit name default access bit description 7:0 led9_pwm 0000 0000 r/w this register controls the duty cycle of led9 pwm output. 0000 0000: 0% duty cycle 0000 0001: 0.3921% duty cycle 0000 0010: 0.7843% duty cycle 0000 0011: 1.1765% duty cycle .... 1111 1111: 100% duty cycle ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 48 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.7 ledx current control with the following register it is possible to control the output current of each current source separately. the resolution of the current sources is 8-bit which gives a step size is 100 a with a maximum output current of 25.5ma per current source. table 32. led1 current control register register: 0x26 led1 current control bit bit name default access bit description 7:0 led1_current 1010 1111 r/w this register controls the output current of current source led1 in 100a steps from 0a up to 25.5ma. 0000 0000: 0ma 0000 0001: 0.1ma ... 1010 1111: 17.5ma ... 1111 1110: 25.4ma 1111 1111: 25.5ma table 33. led2 current control register register: 0x27 led2 current control bit bit name default access bit description 7:0 led2_current 1010 1111 r/w this register controls the output current of current source led2 in 100a steps from 0a up to 25.5ma. 0000 0000: 0ma 0000 0001: 0.1ma ... 1010 1111: 17.5ma ... 1111 1110: 25.4ma 1111 1111: 25.5ma table 34. led3 current control register register: 0x28 led3 current control bit bit name default access bit description 7:0 led3_current 1010 1111 r/w this register controls the output current of current source led3 in 100a steps from 0a up to 25.5ma. 0000 0000: 0ma 0000 0001: 0.1ma ... 1010 1111: 17.5ma ... 1111 1110: 25.4ma 1111 1111: 25.5ma ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 49 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n table 35. led4 current control register register: 0x29 led4 current control bit bit name default access bit description 7:0 led4_current 1010 1111 r/w this register controls the output current of current source led4 in 100a steps from 0a up to 25.5ma. 0000 0000: 0ma 0000 0001: 0.1ma ... 1010 1111: 17.5ma ... 1111 1110: 25.4ma 1111 1111: 25.5ma table 36. led5 current control register register: 0x2a led5 current control bit bit name default access bit description 7:0 led5_current 1010 1111 r/w this register controls the output current of current source led5 in 100a steps from 0a up to 25.5ma. 0000 0000: 0ma 0000 0001: 0.1ma ... 1010 1111: 17.5ma ... 1111 1110: 25.4ma 1111 1111: 25.5ma table 37. led6 current control register register: 0x2b led6 current control bit bit name default access bit description 7:0 led6_current 1010 1111 r/w this register controls the output current of current source led6 in 100a steps from 0a up to 25.5ma. 0000 0000: 0ma 0000 0001: 0.1ma ... 1010 1111: 17.5ma ... 1111 1110: 25.4ma 1111 1111: 25.5ma ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 50 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n table 38. led7 current control register register: 0x2c led7 current control bit bit name default access bit description 7:0 led7_current 1010 1111 r/w this register controls the output current of current source led7 in 100a steps from 0a up to 25.5ma. 0000 0000: 0ma 0000 0001: 0.1ma ... 1010 1111: 17.5ma ... 1111 1110: 25.4ma 1111 1111: 25.5ma table 39. led8 current control register register: 0x2d led8 current control bit bit name default access bit description 7:0 led8_current 1010 1111 r/w this register controls the output current of current source led8 in 100a steps from 0a up to 25.5ma. 0000 0000: 0ma 0000 0001: 0.1ma ... 1010 1111: 17.5ma ... 1111 1110: 25.4ma 1111 1111: 25.5ma table 40. led9 current control register register: 0x2e led9 current control bit bit name default access bit description 7:0 led9_current 1010 1111 r/w this register controls the output current of current source led9 in 100a steps from 0a up to 25.5ma. 0000 0000: 0ma 0000 0001: 0.1ma ... 1010 1111: 17.5ma ... 1111 1110: 25.4ma 1111 1111: 25.5ma ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 51 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.8 misc this register contains miscellaneous control bits like the clock detection. program execution is clocked with internal 32.7 khz clock or with external clock. external clock can be used if a clock signal is present on clk-pin. the external clock frequency must be 32.7 khz in oder to meet the timing specifications of the datasheet and for correct operation. if a higher or a lower frequency is used, it will affect on the program execution engine operation speed. the detector block does not limit the maximum frequency. external clock status can be checked with read only bit ext_clk_used in register address 3a, when the external clock detection is enabled (bit [1] clk_det_en = high). if external clock is not used in the application, clk pin should be connected to gnd to avoid oscillation on this pin and extra current consumption. table 41. output on/off control lsb register register: 0x05 output on/off control lsb bit bit name default access bit description 7 variable_d_sel 0 r/w the variable d can be linked to two different sources. the default source for variable d is register 0x3c but it can be assigned to the led test adc output. this allows, for example, program execution control with an analog signal. 0: variable d source is register 0x3c 1: variable d source is led test adc. 6 en_auto_incr 1 r/w the automatic increment feature of the serial bus address enables a quick memory write of successive registers within one transmission. 0: serial bus address automatic increment is disabled. 1: serial bus address automatic increment is enabled. 5 powersave_en 0 r/w please refer to section 8.14.9 for a detailed description of the powersave mode of AS3661. 0: power save mode is disabled. 1: power save mode is enabled. 4:3 cp_mode 00 r/w this register bits control the operation mode of the integrated charge pump. the charge pump can be switched off, forced to bypass mode, forced to 1.5x mode and automatic operation. 00: cp is switched off. 01: cp is forced to bypass mode (1x). 10: cp is forced to 1.5x mode (output voltage is 4.5v) 11: cp is in automatic mode depending on load conditions 2 pwm_ps_en 0 r/w for a detailed description of this power save mode please refer to section 8.14.10. this mode can only be used if the cp is in off mode or 1x mode. 0: pwm power save mode disabled. 1: pwm power save mode enabled. 1 clk_det_en 00 r/w the following bits define the clock selection of AS3661. 00: forced external clock (clk pin). 01: forced internal clock. 10: automatic clock selection. 11: internal clock. 0 int_clk_en ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 52 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.9 enginex pc the program counter defines the starting value for each program execution engine. it can be any value between 000 0000 to 101 1111. the maximum value depends on program memory allocation between the three program execution engines. 8.10.10 status/interrupt this register contains several status and interrupt registers. table 42. engine1 pc register register: 0x37 engine1 pc bit bit name default access bit description 6:0 engine1_pc 000 0000 r/w program counter value for execution engine1 from 000 0000 to 101 1111 depending on the memory allocation of the application. table 43. engine2 pc register register: 0x38 engine2 pc bit bit name default access bit description 6:0 engine2_pc 000 0000 r/w program counter value for execution engine2 from 000 0000 to 101 1111 depending on the memory allocation of the application. table 44. engine3 pc register register: 0x39 engine3 pc bit bit name default access bit description 6:0 engine3_pc 000 0000 r/w program counter value for execution engine 3 from 000 0000 to 101 1111 depending on the memory allocation of the application. table 45. status / interrupt register register: 0x3a status / interrupt bit bit name default access bit description 7 ledtest_meas_d one 0 r/w this bit indicates when the led test is done, and the result is written to the led_test_adc register (0x42). typically the conversion takes 2.7 milliseconds to complete. the bit will not be cleared after conversion. each write command to this register starts another conversion. 0: led test not done. 1: led test done. 6 mask_busy 1 r/w mask bit for interrupts generated by startup_busy or engine_busy. 0: external interrupt will be generated when startup_busy or engine_busy condition is no longer true. reading the register 3a clears the status bits [5:4] and releases int pin to high state. 1: interrupt events will be masked i.e. no external interrupt will be generated from startup_busy or engine_busy event (default). ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 53 - 85 AS3661 datasheet 5 startup_busy 0 r a status bit which indicates that the device is running the internal start-up sequence. please note that startup_busy bit is always 1 when chip_en bit is 0. please refer to section 8.5 for detailed startup mode description. 0: internal start-up sequence completed. 1: internal start-up sequence running. 4 engine_busy 0 r a status bit which indicates that a program execution engine is clearing internal registers. serial bus master should not write or read program memory, or registers 0x00, 0x37 to 0x39 or 0x4c to 0x4e, when this bit is set to "1". 0: engine ready. 1: at least one of the engines is clearing internal registers. 3 ext_clk_used 0 r this bit is high when external clock signal on clk pin is detected. clk_det_en bit high in address 36 enables the clock detection. 0: external clock not detected. 1: external clock detected. 2 eng1_int 0 r this is the interrupt status bit for program execution engine 1. the bit is set by end or int instruction. reading the interrupt bit clears the interrupt. 0: interrupt unset/cleared. 1: interrupt set. 1 eng2_int 0 r this is the interrupt status bit for program execution engine 2. the bit is set by end or int instruction. reading the interrupt bit clears the interrupt. 0: interrupt unset/cleared. 1: interrupt set. 0 eng3_int 0 r this is the interrupt status bit for program execution engine 3. the bit is set by end or int instruction. reading the interrupt bit clears the interrupt. 0: interrupt unset/cleared. 1: interrupt set. table 45. status / interrupt register register: 0x3a status / interrupt bit bit name default access bit description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 54 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.11 gpo AS3661 has one general purpose output pin (gpo). status of the pin can be controlled with this register. also, int pin can be configured to function as a gpo by setting the bit en_gpo_int. when int is configured to function as a gpo, output level is defined by the vbat voltage. when int pins gpo function is disabled, it operates as an open drain pin. int signal is active low, i.e. when interrupt signal is send, the pin is pulled to gnd. external pull-up resistor is needed for proper functionality. 8.10.12 variable the variable can be sued to store data in order to control for example the data flow. 8.10.13 reset table 46. gpo register register: 0x3b gpo bit bit name default access bit description 2 int_conf 0 r/w this bit defines the function of gpo pin. it can either be configures as interrupt pin or as general purpose output pin. 0: int pin is set to function as an interrupt pin. 1: int pin is configured to function as a gpo. 1 gpo 0 r/w this register controls the state of pin gpo. 0: gpo pin state is low. 1: gpo pin state is high. gpo pin is a digital cmos output, and no pulldown resistor is needed. 0 int_gpo 0 r/w if int pin is defined as general purpose output (int_conf bit must be set to1), it is possible to control the int pin with this bit. 0: int pin state is low (if int_conf = 1). 1: int pin state is high (if int_conf = 1). table 47. gpo register register: 0x3c gpo bit bit name default access bit description 7:0 variable_d 0000 0000 r/w these bits are used for storing a global 8Cbit variable. variable can be used to control program flow. table 48. reset register register: 0x3d reset bit bit name default access bit description 7:0 reset 0000 0011 r/w writing 11111111 into this register resets the AS3661. internal registers are reset to the default values. reading reset register returns 00000011. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 55 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.14 temp adc control 8.10.15 temperature read note: when writing temperature data outside the range of the temperature compensation: values greater than 89c will be set to 89c; values less than -38c will be set to -38c. table 49. temp adc control register register: 0x3e temp adc control bit bit name default access bit description 7 temp_meas_busy 0 r indicates the status of the temperature measurement adc of AS3661. 0: temperature measurements done or not activated. 1: temperature measurement active. 2 en_temp_sensor 0 r/w every time when en_temp_sensor is written high a new measurement period is started. the length of the measurement period depends on temperature. at 25c a measurement takes 20 milliseconds. temperature can be read from register 0x3f. 0: temperature sensor disabled. 1: enable internal temperature sensor and start measurement. 1 continuous_con v 0 r/w when en_temp_sensor bit is set to1 it is possible to enable a continuous temperature conversation setting the continuous_conv bit in this register. 0: new temperature measurement period initiated during start-up or after exit from power save mode. 1: continuous temperature measurement. not active when the device is in powersave. 0 sel_ext_temp 0 r/w it is possible to link the temperature compensation register either to the internal temperature measurement result register 0x3f or to the temperature write register 0x40. this register can be sued to store the temperature of an external temperature measurement device to AS3661 in order to use it for led temperature compensation. 0: temperature compensation source register addr 3fh. 1: temperature compensation source register addr 40h. table 50. temperature read register register: 0x3f temperature read bit bit name default access bit description 7:0 temperature _read 0001 1001 r these bits are used for storing an 8-bit temperature reading acquired from the internal temperature sensor. this register is a read-only register. temperature reading is stored in 8-bit two's complement format, see the table below. 1101 1010: -38c ... 0001 1001: 25c ... 0101 1000: 88c 0101 1001: 89c ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 56 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.16 temperature write note: when writing temperature data outside the range of the temperature compensation: values greater than 89c will be set to 89c; values less than -38c will be set to -38c. 8.10.17 led test control table 51. temperature write register register: 0x40 temperature write bit bit name default access bit description 7:0 temperature _write 0000 0000 r/w these bits are used for storing an 8-bit temperature reading acquired from an external temperature sensor, if such a sensor is used. temperature reading is stored in 8-bit two's complement format, see the table below. 1101 1010: -38c ... 0001 1001: 25c ... 0101 1000: 88c 0101 1001: 89c table 52. led test control register register: 0x41 led test control bit bit name default access bit description 7 en_led_test _adc 0 r/w writing this bit high (1) fires single led test conversation. thus each time you want to start a conversion it is necessary to write a 1 to this register. the measurement cycle is 2.7 milliseconds per conversion. 0: led test measurement disabled. 1: led test measurement enabled 6 en_led_test_int 0 r/w this register enabled the interrupt for the led test adc. interrupt can be cleared by reading status/interrupt register 0x3a. 0: no interrupt signal will be send to the int pin when the led test is accomplished. 1: interrupt signal will be send to the int pin when the led test is accomplished. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 57 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.18 led test adc 5 continuous _conv 0 r/w when en_led_test_adc bit is set to1, it is possible to enable a continuous conversation setting the continuous_conv bit to 1 in this register. 0: continuous conversion is disabled. 1: continuous led test measurement. not active in powersave mode. 4:0 led_test_ctrl 0 0000 r/w these bits are used for choosing the led driver output to be measured with the led test adc. in addition to the led outputs is is possible to measure vdd , int-pin and charge- pump output voltage as well. 0 0000: led1 0 0001: led2 0 0010: led3 0 0011: led4 0 0100: led5 0 0101: led6 0 0110: led7 0 0111: led8 0 1000: led9 0 1001 to 0 1110: reserved, do not use 0 1111: vcp 1 0000: vbat 1 0001: int-pin 10010 to 11111: reserved, do not use table 53. led test adc register register: 0x42 led test adc bit bit name default access bit description 7:0 led_test_adc n/a r this is used to store the led test result. read-only register. led test adc least significant bit corresponds to 30mv. the measured voltage v (typ.) is calculated as follows: v = (result(dec) x 0.03 - 1.478 v. for example, if the result is 10100110 = 166(dec), the measured voltage is 3.50v (typ.) (see figure 28 on page 58) . t able 52. led test control register register: 0x41 led test control bit bit name default access bit description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 58 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n figure 28. led test results vs. measured voltage 8.10.19 engine1 variable a 8.10.20 engine2 variable a 8.10.21 engine3 variable a 8.10.22 master fader1 table 54. engine1 variable a register register: 0x45 engine1 variable a bit bit name default access bit description 7:0 engine1_ variable_a 0000 0000 r these bits are used for engine 1 as a local variable. the register is a read only register and can be used for example for arithmetic operations with the program execution engine. table 55. engine2 variable a register register: 0x46 engine2 variable a bit bit name default access bit description 7:0 engine2_ variable_a 0000 0000 r these bits are used for engine 2 as a local variable. the register is a read only register and can be used for example for arithmetic operations with the program execution engine. table 56. engine3 variable a register register: 0x47 engine3 variable a bit bit name default access bit description 7:0 engine3_ variable_a 0000 0000 r these bits are used for engine 3 as a local variable. the register is a read only register and can be used for example for arithmetic operations with the program execution engine. table 57. master fader1 register register: 0x48 master fader1 bit bit name default access bit description 7:0 master_fader1 0000 0000 r/w an 8-bit register to control all the led-drivers mapped to master fader1. master fader allows the user to control dimming of multiple leds with a single serial bus write. this is a faster method to control the dimming of multiple leds compared to the dimming done with the pwm registers (address 0x16 to 0x1e), which would need multiple writes. 0 1 2 3 4 5 40 90 140 190 result (dec) voltage (v) ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 59 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.23 49 master fader2 8.10.24 4a master fader3 8.10.25 eng1 prog start addr 8.10.26 eng2 prog start addr 8.10.27 eng3 prog start addr table 58. master fader2 register register: 0x49 master fader2 bit bit name default access bit description 7:0 master_fader2 0000 0000 r/w an 8-bit register to control all the led-drivers mapped to master fader2. master fader allows the user to control dimming of multiple leds with a single serial bus write. this is a faster method to control the dimming of multiple leds compared to the dimming done with the pwm registers (address 0x16 to 0x1e), which would need multiple writes. table 59. master fader3 register register: 0x4a master fader3 bit bit name default access bit description 7:0 master_fader3 0000 0000 r/w an 8-bit register to control all the led-drivers mapped to master fader3. master fader allows the user to control dimming of multiple leds with a single serial bus write. this is a faster method to control the dimming of multiple leds compared to the dimming done with the pwm registers (address 0x16 to 0x1e), which would need multiple writes. table 60. eng1 prog start addr register register: 0x4c eng1 prog start addr bit bit name default access bit description 6:0 eng1_prog_ start_addr 000 0000 r/w the program memory start address for program execution engine 1 is defined in this register. table 61. eng2 prog start addr register register: 0x4d eng2 prog start addr bit bit name default access bit description 6:0 eng2_prog_ start_addr 000 0000 r/w the program memory start address for program execution engine 2 is defined in this register. table 62. eng2 prog start addr register register: 0x4e eng3 prog start addr bit bit name default access bit description 6:0 eng3_prog_ start_addr 000 0000 r/w the program memory start address for program execution engine 3 is defined in this register. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 60 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.28 prog mem page select 8.10.29 eng1 mapping msb 8.10.30 71h eng1 mapping lsb table 63. prog mem page sel register register: 0x4f prog mem page sel bit bit name default access bit description 2:0 page_sel 000 r/w these bits select the program memory page. the program memory is divided into six pages of 16 instructions; thus the total amount of the program memory is 96 instructions. 000: program memory 0x00 - 0x0f selected. 001: program memory 0x10 - 0x1f selected. 010: program memory 0x20 - 0x2f selected. 011: program memory 0x30 - 0x3f selected. 100: program memory 0x40 - 0x4f selected. 101: program memory 0x50 - 0x5f selected. table 64. eng1 mapping msb register register: 0x70 eng1 mapping msb bit bit name default access bit description 7 eng1_gpo 0 r 0: gpo pin non-mapped to the program exec. engine 1. 1: gpo pin is mapped to the program execution engine 1. 0 eng1_led9 0 r 0: led9 pin non-mapped to the program exec. engine1. 1: led9 pin is mapped to the program execution engine 1. table 65. eng1 mapping lsb register register: 0x71 eng1 mapping lsb bit bit name default access bit description 7 eng1_led8 0 r 0: led8 pin non-mapped to the program exec. engine 1. 1: led8 pin is mapped to the program execution engine 1. 6 eng1_led7 0 r 0: led7 pin non-mapped to the program exec. engine 1. 1: led7 pin is mapped to the program execution engine 1. 5 eng1_led6 0 r 0: led6 pin non-mapped to the program exec. engine 1. 1: led6 pin is mapped to the program execution engine1. 4 eng1_led5 0 r 0: led5 pin non-mapped to the program exec. engine 1. 1: led5 pin is mapped to the program execution engine 1. 3 eng1_led4 0 r 0: led4 pin non-mapped to the program exec. engine 1. 1: led4 pin is mapped to the program execution engine 1. 2 eng1_led3 0 r 0: led3 pin non-mapped to the program exec. engine 1. 1: led3 pin is mapped to the program execution engine 1. 1 eng1_led2 0 r 0: led2 pin non-mapped to the program exec. engine 1. 1: led2 pin is mapped to the program execution engine 1. 0 eng1_led1 0 r 0: led1 pin non-mapped to the program exec. engine 1. 1: led1 pin is mapped to the program execution engine 1. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 61 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.31 eng2 mapping msb 8.10.32 eng2 mapping lsb 8.10.33 eng3 mapping msb table 66. eng2 mapping msb register register: 0x72 eng2 mapping msb bit bit name default access bit description 7 eng2_gpo 0 r 0: gpo pin non-mapped to the program exec. engine 2. 1: gpo pin is mapped to the program execution engine 2. 0 eng2_led9 0 r 0: led9 pin non-mapped to the program exec. engine2. 1: led9 pin is mapped to the program execution engine 2. table 67. eng2 mapping lsb register register: 0x73 eng2 mapping lsb bit bit name default access bit description 7 eng2_led8 0 r 0: led8 pin non-mapped to the program exec. engine 2. 1: led8 pin is mapped to the program execution engine 2. 6 eng2_led7 0 r 0: led7 pin non-mapped to the program exec. engine 2. 1: led7 pin is mapped to the program execution engine 2. 5 eng2_led6 0 r 0: led6 pin non-mapped to the program exec. engine 2. 1: led6 pin is mapped to the program execution engine 2. 4 eng2_led5 0 r 0: led5 pin non-mapped to the program exec. engine 2. 1: led5 pin is mapped to the program execution engine 2. 3 eng2_led4 0 r 0: led4 pin non-mapped to the program exec. engine 2. 1: led4 pin is mapped to the program execution engine 2. 2 eng2_led3 0 r 0: led3 pin non-mapped to the program exec. engine 2. 1: led3 pin is mapped to the program execution engine 2. 1 eng2_led2 0 r 0: led2 pin non-mapped to the program exec. engine 2. 1: led2 pin is mapped to the program execution engine 2. 0 eng2_led1 0 r 0: led1 pin non-mapped to the program exec. engine 2. 1: led1 pin is mapped to the program execution engine 2. table 68. eng3 mapping msb register register: 0x74 eng3 mapping msb bit bit name default access bit description 7 eng3_gpo 0 r 0: gpo pin non-mapped to the program exec. engine 3. 1: gpo pin is mapped to the program execution engine 3. 0 eng3_led9 0 r 0: led9 pin non-mapped to the program exec. engine 3. 1: led9 pin is mapped to the program execution engine 3. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 62 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.34 eng3 mapping lsb table 69. eng3 mapping lsb register register: 0x75 eng3 mapping lsb bit bit name default access bit description 7 eng3_led8 0 r 0: led8 pin non-mapped to the program exec. engine 3. 1: led8 pin is mapped to the program execution engine 3. 6 eng3_led7 0 r 0: led7 pin non-mapped to the program exec. engine 3. 1: led7 pin is mapped to the program execution engine 3. 5 eng3_led6 0 r 0: led6 pin non-mapped to the program exec. engine 3 . 1: led6 pin is mapped to the program execution engine 3. 4 eng3_led5 0 r 0: led5 pin non-mapped to the program exec. engine 3. 1: led5 pin is mapped to the program execution engine 3. 3 eng3_led4 0 r 0: led4 pin non-mapped to the program exec. engine 3. 1: led4 pin is mapped to the program execution engine 3. 2 eng3_led3 0 r 0: led3 pin non-mapped to the program exec. engine 3. 1: led3 pin is mapped to the program execution engine 3. 1 eng3_led2 0 r 0: led2 pin non-mapped to the program exec. engine 3. 1: led2 pin is mapped to the program execution engine 3. 0 eng3_led1 0 r 0: led1 pin non-mapped to the program exec. engine 3. 1: led1 pin is mapped to the program execution engine 3. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 63 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.10.35 gain change ctrl with hysteresis and timer bits the user can optimize the charge pump performance to better meet the requirements of the application at hand. some applications need to be optimized for efficiency and others need to be optimized for minimum emi, for example. note: values above are typical and should not be used as product specification. writing to treshold [7:6] bits by the user overrides factory settings. factory settings aren't user accessible. table 70. gain change ctrl register register: 0x76 gain change ctrl bit bit name default access bit description 7:6 treshold 00 r/w bits set the threshold voltage at which the charge pump gain changes from 1.5x to 1x. the threshold voltage is defined as the voltage difference between highest voltage output (led1 to led6) and input voltage v bat : v treshold = v bat - max (voltage on led1 to led6). if v treshold is larger than the set value (100mv to 400mv), the charge pump is in 1x mode. 00: 400mv 01: 300mv 10: 200mv 11: 100mv 5 adaptive_ tresh_en 0 r/w gain change hysteresis prevents the mode from toggling back and forth (1x -> 1.5x -> 1x...) , which would cause ripple on v in and led flicker. when the adaptive threshold is enabled, the width of the hysteresis region depends on the choice of treshold bits (see above), saturation of the current sources, charge pump load current, pwm overlap and temperature. 0: adaptive threshold disabled. 1: adaptive threshold enabled. 4:3 timer 00 r/w a forced mode change from 1.5x to 1.0x is attempted at the interval specified with these bits. mode change is allowed if there is enough voltage over the led drivers to ensure proper operation. set force_1x to "1" (see below) to activate this feature. 00: 5ms 01: 10ms 10: 50ms 11: infinite 2 force_1x 0 r activates forced mode change. in forced mode charge pump mode change from 1.5x to 1x is attempted at the interval specified with the timer bits. 0: forced mode changes disabled. 1: forced mode changes disabled. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 64 - 85 AS3661 1v0 datasheet - d e t a i l e d d e s c r i p t i o n 8.11 instruction set AS3661 has three independent programmable execution engines. all the program execution engines have their own program memory block allocated by the user. note that in order to access program memory the operation mode needs to be load program, at least for one of the three program execution engines. program execution is clocked with 32 768hz clock. this clock can be generated internally or external 32 khz clock can be connected to clk32k pin. using external clock enables synchronization of led timing to the external clock signal. supported instruction set is listed in the tables below: table 71. led driver instructions led driver instructions compiler command bit [15] bit [14] bit [13] bit [12] bit [11] bit [10] bit [9] bit [8] bit [7] bit [6] bit [5] bit [4] bit [3] bit [2] bit [1] bit [0] ramp 1 1 . this opcode is used with numerical operands. rmp 0 pre- scale step time sign # of increments ramp 2 2. this opcode is used with variables. r wv 1 0 0 0 0 1 0 0 0 0 pre- scale sign step time # of increments set_pwm 1 spw 0 1 0 0 0 0 0 0 pwm value s et_pwm 2 spv 1 0 0 0 0 1 0 0 0 1 1 0 0 0 pwm value w ait wait 0 pre- scale time 0 0 0 0 0 0 0 0 0 table 72. led mapping instructions led mapping instructions compiler command bit [15] bit [14] bit [13] bit [12] bit [11] bit [10] bit [9] bit [8] bit [7] bit [6] bit [5] bit [4] bit [3] bit [2] bit [1] bit [0] mux_ld_start mls 1 0 0 1 1 1 1 0 0 sram address 0-95 mux_map_start mms 1 0 0 1 1 1 0 0 0 mux_ld_end mle 1 0 0 1 1 1 0 0 1 mux_sel msl 1 0 0 1 1 1 0 1 0 led select mux_clr mcl 1 0 0 1 1 1 0 1 0 0 0 0 0 0 0 0 mux_map_next mmn 1 0 0 1 1 1 0 1 1 0 0 0 0 0 0 0 mux_map_prev mmp 1 0 0 1 1 1 0 1 1 1 0 0 0 0 0 0 mux_ld_next mln 1 0 0 1 1 1 0 1 1 0 0 0 0 0 0 1 ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 65 - 85 AS3661 1v0 datasheet - d e t a i l e d d e s c r i p t i o n mux_ld_prev mlp 1 0 0 1 1 1 0 1 1 1 0 0 0 0 0 1 mux_ld_addr mla 1 0 0 1 1 1 1 1 0 sram address 0-95 mux_map_addr mma 1 0 0 1 1 1 1 1 1 table 73. branch instructions branch instructions compiler command bit [15] bit [14] bit [13] bit [12] bit [11] bit [10] bit [9] bit [8] bit [7] bit [6] bit [5] bit [4] bit [3] bit [2] bit [1] bit [0] rst rst 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 branch 1 brn 1 0 1 loop count step number b ranch 2 brv 1 0 0 0 0 1 1 step number loop count i nt int 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 end end 1 1 0 int reset 0 0 0 0 0 0 0 0 0 0 0 trigger trg 1 1 1 wait for trigger send a trigger 0 ext.tr ig x x e3 e2 e1 ext.tr ig x x e3 e2 e1 jne jne 1 0 0 0 1 0 0 number of instructions to be skipped if the operation returns true variable1 variable2 jl jl 1 0 0 0 1 0 1 jge jge 1 0 0 0 1 1 0 je je 1 0 0 0 1 1 1 1. this opcode is used with numerical operands. 2. this opcode is used with variables. note: x stands for dont care table 72. led mapping instructions led mapping instructions compiler command bit [15] bit [14] bit [13] bit [12] bit [11] bit [10] bit [9] bit [8] bit [7] bit [6] bit [5] bit [4] bit [3] bit [2] bit [1] bit [0] ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 66 - 85 AS3661 1v0 datasheet - d e t a i l e d d e s c r i p t i o n table 74. data transfer and arithmetic instructions arithmetic instructions compiler command bit [15] bit [14] bit [13] bit [12] bit [11] bit [10] bit [9] bit [8] bit [7] bit [6] bit [5] bit [4] bit [3] bit [2] bit [1] bit [0] ld ld 1 0 0 1 target variable 0 0 8-bit value add 1 adn 1 0 0 1 0 1 8-bit value a dd 2 adv 1 0 0 1 1 1 0 0 0 0 variable1 variable2 s ub 1 sbn 1 0 0 1 1 0 8-bit value s ub 2 sbv 1 0 0 1 1 1 0 0 0 1 variable1 variable2 1 . this opcode is used with numerical operands. 2. this opcode is used with variables. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 67 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.12 led driver instructions 8.12.1 ramp (numerical operands) this is the instruction useful for smoothly changing from one pwm value into another pwm value on the led1 to led9 outputs, in other words generating ramps (with a negative or positive slope). AS3661 allows programming very fast and very slow ramps. ramp instruction generates a pwm ramp, using the effective pwm value as a starting value. at each ramp step the output is incremented /decremented by one unit, unless the step time span is 0 or # of increments is 0. time span for one ramp step is defined with prescale -bit [14] and step time -bits [13:9]. prescale = 0 sets 0.49 ms cycle time and prescale = 1 sets 15.6 ms cycle time; so the minimum time span for one step is 0.49 ms (prescale * step time span = 0.49ms x 1) and the maximum time span is 15.6 ms x 31 = 484ms/step if all the step time bits [13:9] are set to zero, output value is incremented / decremented during one prescale on the whole. number of increments value defines how many steps will be taken during one ramp instruction: increment maximum value is 255d, which corresponds increment from zero value to the maximum value. if pwm reaches minimum/maximum value (0/255) during the ramp instruction, ramp instruction will be executed to the end regardless of saturation. this enables ramp instruction to be used as a combined ramp & wait instruction. ramp instruction is the wait instruction when the increment bits [7:0] are set to zero. compiler command syntax: rmp, prescale[1], step time[4], sign[1], number of increments[8]; 8.12.1.1 rmp application example let's say that the led dimming is controlled according to the linear scale and effective pwm value at the moment t=0 is 140d (~55%,), as shown in the figure below, and we want to reach a pwm value of 148d (~58%) at the moment t = 1.5s. the parameters for the ramp instruction will be: prescale = 1 (15.625 ms cycle time) step time = 12 (step time span will be 12*15.625 ms = 187.5 ms) sign = 0 (increase pwm output) number of increments = 8 (take 8 steps) compiler command syntax example: rmp, 1, 12, 0, 8; table 75. rmp parameter description name value description prescale 0 divides master clock (32 768 hz) by 16 = 2048 hz -> 0.488 ms cycle time 1 divides master clock (32 768 hz) by 512 = 64 hz -> 15.625 ms cycle time step time 0-31 one ramp increment done in (step time) x (prescale). sign 0 increase pwm output 1 decrease pwm output # of increments 0-255 the number of increment/decrement cycles. note: value 0 takes the same time as increment by 1, but it is the wait instruction. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 68 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n figure 29. ramp instruction example 8.12.2 ramp (variables) programming ramps with variables is very similar to programming ramps with numerical operands. the only difference is that step time and number of increments are captured from variable registers, when the instruction execution is started. if the variables are updated after starting the instruction execution, it will have no effect on instruction execution. again, at each ramp step the output is incremented/decremented by one unless step time is 0 or increment is 0. time span for one step is defined with prescale and step time bits. step time is defined with variable a, b, c or d. variables a, b and c are set with ld-instruction. variable d is a global variable and can be set by writing the variable register (address 0x3c). led test adc register (address 0x42) can be used as a source for the variable d, as well. note: variable a is the only local variable which can be read throughout the serial bus. of course, the variable stored in 3ch can be read (and written), too. setting register 0x06, 0x07, or 0x08 bit log_en high/low sets logarithmic (1) or linear ramp (0). by using the logarithmic ramp setting the visual effect appears like a linear ramp, because the human eye behaves in a logarithmic way. compiler command syntax: rwv, prescale[1], sign[1], step time[2], number of increments[2]; table 76. rwv parameter description name value description prescale 0 divides master clock (32 768 hz) by 16 = 2048 hz -> 0.488 ms cycle time 1 divides master clock (32 768 hz) by 512 = 64 hz -> 15.625 ms cycle time sign 0 increase pwm output 1 decrease pwm output step time 0-3 one ramp increment done in (step time) x (prescale). step time is loaded with the value (5 lsb bits) of the variable defined below. 1 local variable a 2 local variable b 3 local variable c 4 register address 3ch variable d value, or register address 42h value. the value of the variable should be from 00001b to 11111b (1d to 31d) for correct operation. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 69 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.12.2.1 rwv application example let's say that the led dimming is controlled according to the linear scale and effective pwm value at the moment t=0 is 0d (0%,) and we want to reach a pwm value of 255d (100%) at the moment t = 3s. the parameters for the ramp instruction will be: prescale = 0 (0.488 ms cycle time) step time = 4 (use variable d in register 0x3c with a value of 24d) sign = 0 (increase pwm output) number of increments = 0 (use local variable a which must be loaded with the value 255d) compiler command syntax example: rmp, 0, 0, 4, 0; the example above gives us a ramp time of 2.987s (tr = 0.488ms * 24 * 255). figure 30. ramp instruction example with variables 8.12.3 set pwm (numerical operands) this instruction is used for setting the pwm value on the outputs led1 to led9 without any ramps. set pwm output value from 0 to 255 with pwm value bits [7:0]. instruction execution takes sixteen 32 khz clock cycles (=488s) . compiler command syntax: spw, pwm value[8]; # of increments 0-3 the number of increment/decrement cycles. value is taken from variable defined below: 0 local variable a 1 local variable b 2 local variable c 3 register address 0x3c variable d value, or register address 0x42 value. table 77. spw parameter description name value description pwm value 0-255 pwm output duty cycle 0 - 100% table 76. rwv parameter description name value description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 70 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.12.3.1 spw application example the spw command can be used to set the pwm duty cycle of the program execution engine. in the following example we want to set the duty cycle of the pwm output to 55% like in the ramp example in the previous section. the right pwm value can be calculated with the following formula: pwm value = (duty cycle * 255 / 100) = 55% * 255 / 100 = 140. the predefined pwm value can be used as a starting point for dimming leds for example. compiler command syntax: spw, 140; 8.12.4 set pwm (variables) this instruction is used for setting the pwm value on the outputs led1 to led9 without any ramps. in comparison to the spw command, this command is in combination with variables similar to the rwm example in one of the previous sections. compiler command syntax: spv, variable[2]; 8.12.4.1 spv application example the purpose of the spv command is basically the same one like with the spw command in the previous section. the only difference is that this command allows the user the control the pwm duty cycle with the variables of the chip. compiler command syntax example: spw, 0; the example above shows the control of the duty cycle with the local variable a. if the local variable is for example loaded with a value of 100, the duty cycle of the pwm output is set to 39.2%. 8.12.5 wait when a wait instruction is executed, the engine is set in a wait status and the pwm values on the outputs are frozen. this can be used for example to keep the leds enabled for a certain period of time before another up/down dimming process is being initiated. compiler command syntax: wait, prescale[1], time[5]; 8.12.5.1 wait application example in the example shown below we want to have a target wait time of 125ms after dimming up the leds. in order to get the 100ms delay we select a prescaler value 1, which gives a cycle time of 15.625ms. if we divide the 100ms by the cycle time we get the right value for the time parameter which is 8. compiler command syntax example: wait, 1, 8; table 78. spw parameter description name value description variable 0-3 0 local variable a 1 local variable b 2 global variable c 3 register address 3ch variable d value, or register address 42h value. table 79. wait parameter description name value description pre-scale 0 divide master clock (32 768 hz) by 16 which means 0.488 ms cycle time. 1 divide master clock (32 768 hz) by 512 which means 15.625 ms cycle time. time 1-31 total wait time will be = (time) x (prescale). maximum 484 ms, minimum 0.488 ms. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 71 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.13 led mapping instructions these instructions define the engine-to-led mapping. the mapping information is stored in a table, which is stored in the sram (program memory of the AS3661). AS3661 has three program execution engines which can be mapped to 9 led drivers or to one gpo pin. one engine can control one or multiple led drivers. the first part of the program memory of AS3661is usually used for led driver programs of each sequencer. the led mapping is usually put at the end of the program memory where the programmable multiplexer, shown in the block diagram below, gets the information which led must be connected to what sequencer output. figure 31. led mapping memory allocation in order to control and define the mapping of the leds there are totally eleven instructions for the engine-to-led-driver control: mux_ld_start, mux_map_start, mux_ld_end, mux_sel, mux_clr, mux_map_next, mux_map_prev, mux_ld_next, mux_ld_prev, mux_ld_addr and mux_map_addr. with these instructions it is also possible to change the led mapping from one mapping to another mapping, which has been defined in the led mapping table, forth and back to create again more complex light patterns. 8.13.1 mux_ld_start mux_ld_start defines the start of the mapping table location in the memory. compiler command syntax: mls, sram address[7]; 8.13.1.1 mls application example in this example we want to set the start address for the led mapping table to 80d. compiler command syntax example: mls, 80; 8.13.2 mux_ld_end mux_ld_end defines the end of the mapping table location in the memory. it is very important to define the end address of the mapping table, otherwise it could happen if you use relative mapping commands, that the address pointer points to a position outside the mapping table due to the missing end address. compiler command syntax: mle, sram address[7]; table 80. mls parameter description name value description sram address 0-95 mapping table start address table 81. mle parameter description name value description sram address 0-95 mapping table end address ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 72 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.13.2.1 mle application example in this example we want to set the end address for the led mapping table to 85d. compiler command syntax example: mle, 85; 8.13.3 mux_map_start mux_map_start defines the mapping table start address in the memory and the first row of the table will be activated (mapped) at the same time. compiler command syntax: mmp, sram address[7]; 8.13.3.1 mmp application example in the example we would like to set the start address to 80d. in addition to the definition of the start address of the mapping table the first led mapping defined at address 80d gets activated. the difference to the musx_ld_start command, described in one of the previous sections, is that it only defines the start address without activating the led mapping. compiler command syntax example: mmp, 80; 8.13.4 mux_sel with mux_sel instruction one, and only one, led driver (or the gpo-pin) can be connected to a program execution engine. connecting multiple leds to one engine is done with the mapping table. after the mapping has been released from an led, pwm register value will still control the led brightness. if the mapping is released from the gpo pin, serial bus control takes over the gpo state. compiler command syntax: msl, led select[6] 8.13.4.1 msl application example in this example we would like to use the msl command to map a single led to a execution engine. usually we do this with the mapping table but in case we want to use only a single led on one sequencer it is possible to use the msl command. the example command below shows the mapping of led2 to the program execution engine. compiler command syntax example: msl, 2; 8.13.5 mux_clr mux_clr clears engine-to-driver mapping. after the mapping has been released from an led, pwm register value will still control the led brightness. if the mapping is released from the gpo pin, serial bus control takes over the gpo state. compiler command syntax: mcl; this command doesnt support any parameters. table 82. mmp parameter description name value description sram address 0-95 mapping table start address table 83. msl parameter description name value description led select 0-16 0 no drivers selected 1 led1 selected 2 led2 selected .... .... 16 gpo ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 73 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.13.6 mux_map_next this instruction sets the next row active in the mapping table each time it is called. for example, if the 1st row is active at this moment, after mux_map_next instruction call the 2rd row will be active like in the block diagram shown in figure 32 below. f igure 32. mux_map_next command if the mapping table end address is reached, activation will roll to the mapping table start address next time when the mux_map_next instruction is called. engine will not push a new pwm value to the led driver output before set_pwm or ramp instruction is executed. if the mapping has been released from an led, the value in the pwm register will still control the led brightness. if the mapping is released from the gpo pin, serial bus control takes over the gpo state. compiler command syntax: mmn; this command doesnt support any parameters. 8.13.7 mux_map_prev this instruction sets the previous row active in the mapping table each time it is called. for example, if the 3rd row is active at this moment, after mux_map_prev instruction call the 2nd row will be active like in block diagram shown in figure 33 below. f igure 33. mux_map_prev command figure 34. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 74 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n if the mapping table start address is reached, activation will roll to the mapping table end address next time the mux_map_prev instruction is called. engine will not push a new pwm value to the led driver output before set_pwm or ramp instruction is executed. if the mapping has been released from an led, the value in the pwm register will still control the led brightness. if the mapping is released from the gpo pin, serial bus control takes over the gpo state. compiler command syntax: mmp; this command doesnt support any parameters. 8.13.8 mux_ld_next similar than the mux_map_next instruction, but only the index pointer will be set to point to the next row i.e. no mapping will be set and the engine-to-led-driver connection will not be updated. compiler command syntax: mln; this command doesnt support any parameters. 8.13.9 mux_ld_prev similar than the mux_map_prev instruction, but only the index pointer will be set to point to the previous row i.e. no mapping will be set and the engine-to-led-driver connection will not be updated. compiler command syntax: mlp; this command doesnt support any parameters. 8.13.10 mux_map_addr mux_map_addr sets the index pointer to point the mapping table row defined by bits [6:0] and sets the row active. engine will not push a new pwm value to the led driver output before set_pwm or ramp instruction is executed. if the mapping has been released from an led, the value in the pwm register will still control the led brightness. if the mapping is released from the gpo pin, serial bus control takes over the gpo state compiler command syntax: mma, sram address[7]; . 8.13.10.1 mma application example in this example we asume the we have aleady defined the start and end address of the led mapping table. now we want to set address 83d within the address range of the map table active. compiler command syntax example: mma, 83; 8.13.11 mux_ld_addr mux_ld_addr sets the index pointer to point the mapping table row defined by bits [6:0], but the row will not be set active. compiler command syntax: mla, sram address; table 84. mma parameter description name value description sram address 0-95 any sram address containing mapping data. table 85. mla parameter description name value description sram address 0-95 any sram address containing mapping data. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 75 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.14 branch instructions 8.14.1 rst rst instruction resets program counter register (address 37h, 38h, or 39h) and continues executing the program from the program start address defined in 4c-4e. instruction takes sixteen 32 khz clock cycles. compiler command syntax: rst; this command doesnt support any parameters. note: the default value for all program memory registers is 0000h, which is the rst instruction. 8.14.2 branch (numerical) branch instruction is mainly indented for repeating a portion of the program code several times. branch instruction loads step number value to program counter. loop count parameter defines how many times the instructions inside the loop are repeated. AS3661 supports nested looping i.e. loop inside loop. the number of nested loops is not limited. instruction takes sixteen 32 khz clock cycles. compiler command syntax: brn, loop count[6], step number[7]; 8.14.2.1 brn application example in this application example we would like to create an infinite loop, which means the loop will never stop. the code we want to repeat has a start address of 10d. at the end of the code we want to repeat we put the brn command with the program counter address 10d. once the program execution engine executes the brn command the program counter jumps back to address 10d and starts executing the code from this address until it reaches again the brn command. compiler command syntax: example: brn, 0, 10; figure 35. brn example for execution engine 1 table 86. brn parameter description name accepted value description loop count 0-63 the number of loops to be done. 0 means an infinite loop step number 0-95 the step number to be loaded to program counter ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 76 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.14.3 branch (variables) the branch command for variables has basically the same functionality like the numerical command. the only difference is that the loop count is controlled with variables instead of having a fixed number. compiler command syntax: brv, step number[7], loop count[2]; 8.14.4 int send interrupt to processor by pulling the int pin down and setting corresponding status bit high. interrupt can be cleared by reading interrupt bits in status/interrupt register at address 3a. compiler command syntax: int; this command doesnt support any parameters. 8.14.5 end end program execution. instruction takes sixteen 32 khz clock cycles. compiler command syntax: end, int[1], reset[1]; 8.14.5.1 end application example the example code below sends an interrupt to the processor and resets the program counts to 0. the program execution engine is set on hold. compiler command syntax example: end, 1, 0; 8.14.6 trigger wait or send triggers can be used to e.g. synchronize operation between the program execution engines. send trigger instruction takes sixteen 32 khz clock cycles and wait for trigger takes at least sixteen 32 khz clock cycles. the receiving engine stores the triggers which have been sent. received triggers are cleared by wait for trigger instruction. wait for trigger instruction is executed until all the defined triggers have been received (note: several triggers can be defined in the same instruction). table 87. brn parameter description name accepted value description step number 0-95 the step number to be loaded to program counter loop count 0-3 selects the variable for step number value. step number is loaded with the value of the variable defined below 0 local variable a 1 local variable b 2 local variable c 3 register address 3ch variable d value, or register address 42h value table 88. end parameter description name value description int 0 no interrupt will be sent. pwm register values will remain intact. 1 reset program counter value to 0 and send interrupt to processor by pulling the int pin down and setting corresponding status bit high to notify that program has ended. pwm register values will remain intact. interrupt can be cleared by reading interrupt bits in status/interrupt register at address 3a. reset 0 reset program counter value to 0 and hold. pwm register values will remain intact. 1 reset program counter value to 0 and hold. pwm register values of the non-mapped drivers will remain. pwm register values of the mapped drivers will be set to "0000 0000". on completion of int instruction with this bit set to "1" the master fader registers are set to zero as follows: program execution engine 1 sets master fader 1 (48h) to zero, engine 2 sets master fader 2 (49h) to zero and engine 3 sets master fader 3 (4ah) to zero. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 77 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n external trigger input signal must stay low for at least two 32 khz clock cycles to be executed. trigger output signal is three 32 khz clock cycles long. external trigger signal is active low, i.e. when trigger is send/received the pin is pulled to gnd. sent external trigger is masked, i.e. the device which has sent the trigger will not recognize it. if send and wait external trigger are used on the same instruction, the send external trigger is executed first, then the wait external trigger. compiler command syntax: trg, wait for trigger[6], send a trigger[6] 8.14.6.1 trg application example in this example we want to wait/receive a trigger from program execution engine 1. compiler command syntax example: trg, 2, 0; 8.14.7 jne/jl/jge/je AS3661 instruction set includes the following conditional jump instructions: jne (jump if not equal); jge (jump if greater or equal); jl (jump if less); je (jump if equal). if the condition is true a certain number of instructions will be skipped (i.e. the program jumps forward to a location relative to the present location). if condition is false then the next instruction will be executed. compiler command syntax: jne, number of instructions...[5], variable1[2], variable2[2]; compiler command syntax: jl, number of instructions...[5], variable1[2], variable2[2]; compiler command syntax: jge, number of instructions...[5], variable1[2], variable2[2]; compiler command syntax: je, number of instructions...[5], variable1[2], variable2[2]; 8.14.7.1 jne application example in the following example we compare local variable a with local variable b. if the value of the two registers is not equal the command will skip three instructions. compiler command syntax example: jne, 3, 0,1; table 89. trg parameter description name value description wait for trigger 0-31 wait for trigger from the engine(s). several triggers can be defined in the same instruction. bit [7] engages engine 1, bit [8] engine 2, bit [9] engine 3 and bit [12] is for external trigger i/o. bits [10] and [11] are not in use. send a trigger 0-31 send a trigger to the engine(s). several triggers can be defined in the same instruction. bit [1] engages engine 1, bit [2] engine 2, bit [3] engine 3 and bit [6] is for external trigger i/o. bits [4] and [5] are not in use. table 90. jne/jl/jge/je parameter description name value description number of instructions to be skipped if the operation returns true. 0-31 the number of instructions to be skipped when the statement is true. note: value 0 means redundant code. variable1 0-3 defines the variable to be used in the test: 0 local variable a 1 local variable b 2 global variable c3 register address 3ch variable, or register address 42h value variable2 0-3 defines the variable to be used in the test: 0 local variable a 1 local variable b 2 global variable c3 register address 3ch variable, or register address 42h value ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 78 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.15 arithmetic instructions 8.15.1 ld this instruction is used to assign a value into a variable; the previous value in that variable is overwritten. each of the engines have two local variables, called a and b. the variable c is a global variable which is shared with all three program execution engines. compiler command syntax: ld, target variable[2]; 8.15.1.1 ld application example in this example we want to load variable b with a value of 100; compiler command syntax example: ld, 1, 100; 8.15.2 add (numerical operands) operator either adds the 8-bit value to the current value of the target variable. compiler command syntax: adn, target variable,[2], 8-bit value[8]; 8.15.2.1 adn application example in this example we would like to add a value of100 d to variable a, which is loaded with a value of 10d. the result of the operation is 110d stored in variable a. compiler command syntax example: adn, 0, 100; 8.15.3 add (variables) this command adds the value of the variable 1 (a, b, c or d) to the value of the variable 2 (a, b, c or d) and stores the result in the register of variable a, b or c which is defined as target variable. variables overflow from 255 to 0. table 91. ld parameter description name value description target variable 0-2 0 variable a 1 variable b 2 variable c 8-bit value 0-255 variable value table 92. adn parameter description name value description 8-bit value 0-255 variable value target variable 0-2 0 variable a 1 variable b 2 variable c variable1 0-3 0 local variable a 1 local variable b 2 global variable c3 register address 3ch variable, or register address 42h value variable2 0-3 0 local variable a 1 local variable b 2 global variable c3 register address 3ch variable, or register address 42h value ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 79 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n compiler command syntax: adv, target variable[2], variable1[2], variable2[2]; 8.15.3.1 adv application example in this example we want to add variable a to variable b. the result should be stored in variable c. compiler command syntax example: adv, 2, 0, 1; 8.15.4 sub (numerical) sub operator either subtracts the 8-bit value from the current value of the target variable. compiler command syntax: sbn, target variable[2], 8-bit value[8]; 8.15.4.1 sbn application example in this example we would like to subtract 50d from local variable a. the result is stored in variable a. compiler command syntax example: sbn, 0, 50; 8.15.5 sub (variables) the sbv command subtracts the value of the variable 2 (a, b, c or d) from the value of the variable 1 (a, b, c or d) and stores the result in the register of target variable (a, b or c). variables overflow from 0 to 255. compiler command syntax: sbv, target variable[2], variable1[2], variable2[2]; table 93. adv parameter description name value description target variable 0-2 0 variable a 1 variable b 2 variable c variable1 0-3 0 local variable a 1 local variable b 2 global variable c3 register address 3ch variable, or register address 42h value variable2 0-3 0 local variable a 1 local variable b 2 global variable c3 register address 3ch variable, or register address 42h value table 94. sbn parameter description name value description 8-bit value 0-255 variable value target variable 0-2 0 variable a 1 variable b 2 variable c table 95. sbv parameter description name value description target variable 0-2 0 variable a 1 variable b 2 variable c ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 80 - 85 AS3661 datasheet - d e t a i l e d d e s c r i p t i o n 8.15.5.1 sbv application example in this example we would like to subtract variable a from variable b. the result should be stored in variable c. compiler command syntax example: sbv, 2, 0, 1; variable1 0-3 0 local variable a 1 local variable b 2 global variable c3 register address 3ch variable, or register address 42h value variable2 0-3 0 local variable a 1 local variable b 2 global variable c3 register address 3ch variable, or register address 42h value table 95. sbv parameter description name value description ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 81 - 85 AS3661 datasheet - ty p i c a l a p p l i c a t i o n 9 typical application figure 36. typical application 3 rgb leds 1 1 2 2 3 3 4 4 d d c c b b a a c4 470nf c5 470nf c6 1uf c3 1uf gnd gnd gnd sda scl int gpo vbat led1 led2 led3 led4 led5 led6 led7 led8 led9 gpo AS3661 d1 a1 d2 a2 cpout a3 c2- a4 c2+ a5 d3 b1 d4 b2 asel1 b3 c1- b4 c1+ b5 d5 c1 d6 c2 asel0 c3 ven c4 vdd c5 d7 d1 d8 d2 int d3 clk32k d4 gnd d5 d9 e1 gpo e2 trig e3 sda e4 scl e5 u1 AS3661 vcp gnd battery terminal cpu for i2c control enable r1 10k r2 10k r3 10k c2 gnd digital_io digital_io d24 d23 d22 d26 d25 d27 d29 d28 d30 gnd gnd gnd ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 82 - 85 AS3661 datasheet - ty p i c a l a p p l i c a t i o n 9.1 recommended external components the AS3661 requires 4 external capacitors for proper operation. surface-mount multi-layer ceramic capacitors are recommended. tantalum and aluminium capacitors are not recommended because of their high esr. for the flying capacitors (c1 and c2) multi-layer ceramic capacitors should always be used. these capacitors are small, inexpensive and have very low equivalent series resistance (esr <20m w typ.). ceramic capacitors with x7r or x5r temperature characteristic are preferred for use with the AS3661. these capacitors have tight capacitance tolerance (as good as 10%) and hold their value over temperature (x7r: 15% over -55 c to 125c; x5r: 15% over -55c to 8 5c). capacitors with y5v or z5u temperature characteristic are generally not recommended for use with the AS3661. capacitors with these temperature characteristics typically have wide capacitance tolerance (+80%, -20%) and vary significantly over temperature (y5v: +22%, -82% over -30c to +85c range; z5u: +22%, -56% over +10c to +85c range). under some conditions, a nominal 1f y5v or z5u capacitor could have a capacitance of only 0.1f. such detrimental deviation is likely to cause y5v and z5u capacitors to fail to meet the minimum capacitance requirements of the AS3661. for proper operation it is necessary to have at least 0.24 f of effective capacitance for each of the flying capacitors under all operating conditions. the output capacitor c vcpout directly affects the magnitude of the output ripple voltage. in general, the higher the value of c vcpout , the lower the output ripples magnitude. for proper operation it is recommended to have at least 0.50f of effective capacitance for c vbat and c vcpout under all operating conditions. the voltage rating of all four capacitors should be 6.3v; 10v is recommended. recommended external components below lists recommended external components from some leading ceramic capacitor manufacturers. it is strongly recommended that the AS3661 circuit be thoroughly evaluated early in the design-in process with the mass-production capacitors of choice. this will help ensure that any variability in capacitance does not negatively impact circuit performance. figure 37. recommended external components model type vendor voltage rating package size 1f for c vbat and c vcpout c1005x5r1a105k ceramic x5r tdk 10v 0402 lmk105bj105kv-f ceramic x5r taiyo yuden 10v 0402 ecj0eb1a105m ceramic x5r panasonic 10v 0402 ecjuvbpa105 ceramic x5r, array of two panasonic 10v 0504 470f for c fly1 and c fly2 c1005x5r1a474k ceramic x5r tdk 10v 0402 lmk105bj474kv-f ceramic x5r taiyo yuden 10v 0402 ecj0eb0j474k ceramic x5r panasonic 6.3v 0402 leds user defined. note that d7, d8 and d9 outputs are powered from v bat when specifying the leds. ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 83 - 85 AS3661 datasheet - p a c k a g e d r a w i n g s a n d m a r k i n g s 10 package drawings and markings figure 38. wl-csp-25 (2.285x2.285mm) 0.4mm pitch marking note: line 1: austriamicrosystems logo line 2: AS3661 line 3: encoded datecode (4 characters) figure 39. wl-csp-25 (2.285x2.285mm) 0.4mm pitch package dimensions AS3661 top view (through) bottom view (ball side) 1 2 3 pin a1 indicator a b c d 1 2 3 a b c d a b c d a b c d 4 5 4 5 e e e e 5 4 3 2 1 5 4 3 2 1 ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 84 - 85 AS3661 datasheet - o r d e r i n g i n f o r m a t i o n 11 ordering information the devices are available as the standard products shown in table 96 . n ote: all products are rohs compliant and austriamicrosystems green. buy our products or get free samples online at icdirect: http://www.austriamicrosystems.com/icdirect technical support is found at http://www.austriamicrosystems.com/technical-support for further information and requests, please contact us mailto:sales@austriamicrosystems.com or find your local distributor at http://www.austriamicrosystems.com/distributor table 96. ordering information ordering code marking desciption delivery form package AS3661-bwlt AS3661 programmable 9-channel led driver tape and reel wl-csp-25 (2.285x2.285mm) 0.4mm pitch ams ag technical content still valid free datasheet http:///
www.austriamicrosystems.com revision 1.3 85 - 85 AS3661 datasheet - o r d e r i n g i n f o r m a t i o n copyrights copyright ? 1997-2012, austriamicrosystems ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registered ?. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems ag reserves the right to change specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact ams ag technical content still valid free datasheet http:///
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